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LSR (Super FX): Difference between revisions
From SnesLab
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==== Example ==== | |||
Let: | |||
S<sub>reg</sub> : R<sub>8</sub> | |||
D<sub>reg</sub> : R<sub>0</sub> | |||
R<sub>8</sub> = b53fh (1011 0101 0011 1111b) | |||
After executing LSR: | |||
R<sub>0</sub> = 5a9fh (0101 1010 1001 1111b) | |||
CY = 1 | |||
[[File:gsu_lsr.png]] | [[File:gsu_lsr.png]] |
Revision as of 22:43, 8 July 2024
Basic Info | |||||||
---|---|---|---|---|---|---|---|
Addressing Mode | Opcode | Length | ROM Speed | RAM Speed | Cache Speed | ||
Implied (type 1) | 03 | 1 byte | 3 cycles | 3 cycles | 1 cycle |
Flags Affected | ||||||||
---|---|---|---|---|---|---|---|---|
B | ALT1 | ALT2 | O/V | S | CY | Z | ||
0 | 0 | 0 | . | 0 |
LSR (Logical Shift Right) is a Super FX instruction that shifts all bits of the source register's value to the right one bit while shifting a zero into the most significant bit, storing the result in the destination register. Bit 0 is shifted into CY. The source register itself is left unchanged.
Syntax
LSR
Example
Let:
Sreg : R8 Dreg : R0 R8 = b53fh (1011 0101 0011 1111b)
After executing LSR:
R0 = 5a9fh (0101 1010 1001 1111b) CY = 1
See Also
External Links
- Official Nintendo documentation on LSR: 9.55 on Page 2-9-78 of Book II