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MULT (Super FX): Difference between revisions

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MULT #n
MULT #n
</pre>
</pre>
==== Example 1 ====
Let:
S<sub>reg</sub> : R<sub>5</sub>
D<sub>reg</sub> : R<sub>2</sub>
R<sub>5</sub> = 52cfh
R<sub>1</sub> = 63cfh
After executing MULT R<sub>1</sub>:
R<sub>2</sub> = 0961h


=== See Also ===
=== See Also ===

Revision as of 23:59, 8 July 2024

Basic Info
Addressing Mode Opcode Length ROM Speed RAM Speed Cache Speed
Implied (type 1) 8n 1 byte 3 or 5 cycles 3 or 5 cycles 1 or 2 cycles
Immediate 3E8n 2 bytes 6 or 8 cycles 6 or 8 cycles 2 or 3 cycles
Flags Affected
B ALT1 ALT2 O/V S CY Z
0 0 0 . .

MULT is a Super FX instruction that performs a signed multiplication. One of the factors is the low byte of the source register. The other factor may be any register from R0 to R15 or an immediate int from 0 to 15. The product is stored in the destination register.

MULT utilizes the 8-bit multiplier only once, so it is fast.[2]

The exact number of cycles depends on the state of the CFGR register.

Syntax

MULT Rn
MULT #n

Example 1

Let:

Sreg : R5
Dreg : R2
R5 = 52cfh
R1 = 63cfh

After executing MULT R1:

R2 = 0961h

See Also

External Links

  1. Official Nintendo documentation on MULT: 9.66 on Page 2-9-93 of Book II
  2. 8.2 "Multiplication Instructions" on page 2-8-16 of Book II, lbid.