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ASR (Super FX): Difference between revisions
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'''ASR''' (Arithmetic Shift Right) is a [[Super FX]] instruction that shifts all bits of the [[source register]]'s value to the right one bit while also leaving the most significant bit unchanged, storing the result in the [[destination register]]. Bit 0 is shifted into [[CY]]. | '''ASR''' (Arithmetic Shift Right) is a [[Super FX]] instruction that shifts all bits of the [[source register]]'s value to the right one bit while also leaving the most significant bit unchanged, storing the result in the [[destination register]]. Bit 0 is shifted into [[CY]]. | ||
The source and destination registers should be specified in advance using [[WITH]], [[FROM]], or [[TO]]. Otherwise, R<sub>0</sub> serves as the default. | |||
==== Syntax ==== | ==== Syntax ==== |
Revision as of 18:32, 9 July 2024
Basic Info | |||||||
---|---|---|---|---|---|---|---|
Addressing Mode | Opcode | Length | ROM Speed | RAM Speed | Cache Speed | ||
Implied (type 1) | 96 | 1 byte | 3 cycles | 3 cycles | 1 cycle |
Flags Affected | ||||||||
---|---|---|---|---|---|---|---|---|
B | ALT1 | ALT2 | O/V | S | CY | Z | ||
0 | 0 | 0 | . |
ASR (Arithmetic Shift Right) is a Super FX instruction that shifts all bits of the source register's value to the right one bit while also leaving the most significant bit unchanged, storing the result in the destination register. Bit 0 is shifted into CY.
The source and destination registers should be specified in advance using WITH, FROM, or TO. Otherwise, R0 serves as the default.
Syntax
ASR
Example
Let:
Sreg : R10 Dreg : R1 CY = 0 R10 = 4f7bh (0100 1111 0111 1011b)
After executing ASR:
CY = 1 R1 = 27bdh (0010 0111 1011 1101b)
See Also
External Links
- Official Nintendo documentation on ASR: 9.13 on Page 2-9-12 of Book II
- example: page 2-9-13 of Book II, lbid.