ROMB (Super FX): Difference between revisions

Latest revision as of 00:21, 13 July 2024


Basic Info
Addressing Mode	Opcode	Length	ROM Speed	RAM Speed	Cache Speed
Implied (type 1)	3FDF	2 bytes	6 cycles	6 cycles	2 cycles


Flags Affected
B	ALT1	ALT2	O/V	S	CY	Z
0	0	0	.	.	.	.

ROMB is a Super FX instruction that moves the low byte of the source register into ROMBR.

The source register should be specified in advance using WITH or FROM. Otherwise, R₀ serves as the default.

The ALT0 state is restored.

ROMB

Let:

S_reg : R₅
R₅ = 0046h

After executing ROMB, the ROMBR becomes 46h.

@@ Line 1: / Line 1: @@
-'''ROMB''' is a [[Super FX]] instruction that moves a low byte.
+{| class="wikitable" style="float:right;clear:right;width:50%"
+!colspan="8"|Basic Info
+|+
+|'''Addressing Mode'''
+|'''Opcode'''
+|'''Length'''
+|'''ROM Speed'''
+|'''RAM Speed'''
+|'''Cache Speed'''
+|+
+|[[Implied]] (type 1)
+|3FDF
+|2 bytes
+|6 cycles
+|6 cycles
+|2 cycles
+|}
+{| class="wikitable" style="float:right;clear:right;width:30%"
+!colspan="9"|Flags Affected
+|+
+|[[B Flag|B]]
+|[[ALT1]]
+|[[ALT2]]
+|[[O/V]]
+|[[Sign Flag|S]]
+|[[CY]]
+|[[Zero Flag|Z]]
+|+
+|0
+|0
+|0
+|.
+|.
+|.
+|.
+|}
+'''ROMB''' is a [[Super FX]] instruction that moves the low byte of the [[source register]] into [[ROMBR]].
+The source register should be specified in advance using [[WITH]] or [[FROM]].  Otherwise, R<sub>0</sub> serves as the default.
+The [[ALT0]] state is restored.
+==== Syntax ====
+<pre>
+ROMB
+</pre>
+==== Example ====
+Let:
+ S<sub>reg</sub> : R<sub>5</sub>
+ R<sub>5</sub> = 0046h
+After executing ROMB, the ROMBR becomes 46h.
+=== See Also ===
+* [[RAMB]]
+* [[ALT3]]
+=== External Links ===
+* Official Nintendo documentation on ROMB: 9.75 on [https://archive.org/details/SNESDevManual/book2/page/n260 Page 2-9-104 of Book II]
 [[Category:ASM]]
-[[Category:Enhancement Chips]]
+[[Category:Super FX]]
+[[Category:Bank Set-up Instructions]]
+[[Category:Two-byte Instructions]]
+[[Category:Expects Sreg/Dreg Prearranged]]