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BBS (SPC700): Difference between revisions
From SnesLab
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|'''Speed''' | |'''Speed''' | ||
|+ | |+ | ||
| | |[[Direct Page Bit Relative]] | ||
| | |03 | ||
|3 bytes | |||
|when condition false: 5 cycles | |||
when condition true: 7 cycles | |||
|+ | |||
|[[Direct Page Bit Relative]] | |||
|23 | |||
|3 bytes | |||
|when condition false: 5 cycles | |||
when condition true: 7 cycles | |||
|+ | |||
|[[Direct Page Bit Relative]] | |||
|43 | |||
|3 bytes | |||
|when condition false: 5 cycles | |||
when condition true: 7 cycles | |||
|+ | |||
|[[Direct Page Bit Relative]] | |||
|63 | |||
|3 bytes | |||
|when condition false: 5 cycles | |||
when condition true: 7 cycles | |||
|+ | |||
|[[Direct Page Bit Relative]] | |||
|83 | |||
|3 bytes | |||
|when condition false: 5 cycles | |||
when condition true: 7 cycles | |||
|+ | |||
|[[Direct Page Bit Relative]] | |||
|A3 | |||
|3 bytes | |||
|when condition false: 5 cycles | |||
when condition true: 7 cycles | |||
|+ | |||
|[[Direct Page Bit Relative]] | |||
|C3 | |||
|3 bytes | |||
|when condition false: 5 cycles | |||
when condition true: 7 cycles | |||
|+ | |||
|[[Direct Page Bit Relative]] | |||
|E3 | |||
|3 bytes | |3 bytes | ||
|when condition false: 5 cycles | |when condition false: 5 cycles | ||
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{| class="wikitable" style="float:right;clear:right;width:30%" | {| class="wikitable" style="float:right;clear:right;width:30%" | ||
!colspan="8"|Flags | !colspan="8"|Flags Affected | ||
|+ | |+ | ||
|N | |[[Negative Flag|N]] | ||
|V | |[[Overflow Flag|V]] | ||
|P | |[[Direct Page Flag|P]] | ||
|B | |[[Break Flag|B]] | ||
|H | |[[Half-Carry Flag|H]] | ||
|I | |[[Interrupt Enable Flag|I]] | ||
|Z | |[[Zero Flag|Z]] | ||
|C | |[[Carry Flag|C]] | ||
|+ | |+ | ||
|. | |. | ||
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|} | |} | ||
'''BBS''' (Branch on Bit Set) is an [[SPC700]] that performs a branch when the [[direct page | '''BBS''' (Branch on Bit Set) is an [[SPC700]] instruction that performs a branch when a bit in the [[direct page]] is set. The index to the direct page byte that bit lives in is the first operand byte. Which bit within that byte is a specified by the top 3 bits of the opcode. The target relative address to jump to is the second operand byte. In Nintendo's manual, the high nybble of the opcode is called x. | ||
In assembly source, the two operands appear in the same order that they do in the instruction stream. | |||
No flags are affected. | |||
==== Syntax ==== | |||
<pre> | |||
BBS dp, bit, rel | |||
</pre> | |||
=== See Also === | === See Also === | ||
| Line 42: | Line 93: | ||
=== References === | === References === | ||
* [https://archive.org/details/SNESDevManual/book1/page/n233 Appendix C-8 of Book I] of the official Super Nintendo development manual | * Table C-15, [https://archive.org/details/SNESDevManual/book1/page/n233 Appendix C-8 of Book I] of the official Super Nintendo development manual | ||
* anomie: https://github.com/yupferris/TasmShiz/blob/8fabc9764c33a7ae2520a76d80ed7220bb939f12/spc700.txt#L349 | |||
[[Category:ASM]] | [[Category:ASM]] | ||
[[Category:SPC700]] | [[Category:SPC700]] | ||
[[Category:Branching Commands]] | [[Category:Branching Commands]] | ||
Latest revision as of 22:21, 13 July 2024
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Direct Page Bit Relative | 03 | 3 bytes | when condition false: 5 cycles
when condition true: 7 cycles |
||||
| Direct Page Bit Relative | 23 | 3 bytes | when condition false: 5 cycles
when condition true: 7 cycles |
||||
| Direct Page Bit Relative | 43 | 3 bytes | when condition false: 5 cycles
when condition true: 7 cycles |
||||
| Direct Page Bit Relative | 63 | 3 bytes | when condition false: 5 cycles
when condition true: 7 cycles |
||||
| Direct Page Bit Relative | 83 | 3 bytes | when condition false: 5 cycles
when condition true: 7 cycles |
||||
| Direct Page Bit Relative | A3 | 3 bytes | when condition false: 5 cycles
when condition true: 7 cycles |
||||
| Direct Page Bit Relative | C3 | 3 bytes | when condition false: 5 cycles
when condition true: 7 cycles |
||||
| Direct Page Bit Relative | E3 | 3 bytes | when condition false: 5 cycles
when condition true: 7 cycles | ||||
| Flags Affected | |||||||
|---|---|---|---|---|---|---|---|
| N | V | P | B | H | I | Z | C |
| . | . | . | . | . | . | . | . |
BBS (Branch on Bit Set) is an SPC700 instruction that performs a branch when a bit in the direct page is set. The index to the direct page byte that bit lives in is the first operand byte. Which bit within that byte is a specified by the top 3 bits of the opcode. The target relative address to jump to is the second operand byte. In Nintendo's manual, the high nybble of the opcode is called x.
In assembly source, the two operands appear in the same order that they do in the instruction stream.
No flags are affected.
Syntax
BBS dp, bit, rel
See Also
References
- Table C-15, Appendix C-8 of Book I of the official Super Nintendo development manual
- anomie: https://github.com/yupferris/TasmShiz/blob/8fabc9764c33a7ae2520a76d80ed7220bb939f12/spc700.txt#L349