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SBK (Super FX): Difference between revisions

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(blurb about specifying sreg/dreg in advance)
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|'''Cache Speed'''
|'''Cache Speed'''
|+
|+
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|[[Implied]] (type 1)
|90
|90
|1 byte
|1 byte
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|[[Sign Flag|S]]
|[[Sign Flag|S]]
|[[CY]]
|[[CY]]
|Z
|[[Zero Flag|Z]]
|+
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'''SBK''' is a [[Super FX]] instruction that uses [[Bulk Processing]]. It stores the value in the [[source register]] to the address in the [[Ram Address Cache (Super FX)|ram address cache]].
'''SBK''' is a [[Super FX]] instruction that uses [[bulk processing]]. It stores the value in the [[source register]] to the address in the [[Ram Address Cache (Super FX)|ram address cache]].
 
The [[ALT0]] state is restored.


The source register should be specified in advance using [[WITH]] or [[FROM]].  Otherwise, R<sub>0</sub> serves as the default.
The source register should be specified in advance using [[WITH]] or [[FROM]].  Otherwise, R<sub>0</sub> serves as the default.
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SBK
SBK
</pre>
</pre>
==== Example ====
Let:
(70:3230h) = 51h
(70:3231h) = 49h
RAMBR = 70h
After executing this program:
LM  R<sub>1</sub>, (3230h)
INC  R<sub>1</sub>
SBK
We have:
R<sub>1</sub> = 4952h
(70:3230h) = 52h
(70:3231h) = 49h


=== External Links ===
=== External Links ===

Latest revision as of 05:18, 16 July 2024

Basic Info
Addressing Mode Opcode Length ROM Speed RAM Speed Cache Speed
Implied (type 1) 90 1 byte 3 to 8 cycles 7 to 11 cycles 1 to 6 cycles
Flags Affected
B ALT1 ALT2 O/V S CY Z
0 0 0 . . . .

SBK is a Super FX instruction that uses bulk processing. It stores the value in the source register to the address in the ram address cache.

The ALT0 state is restored.

The source register should be specified in advance using WITH or FROM. Otherwise, R0 serves as the default.

Syntax

SBK

Example

Let: 

(70:3230h) = 51h
(70:3231h) = 49h
RAMBR = 70h

After executing this program: 

LM   R1, (3230h)
INC  R1
SBK

We have: 

R1 = 4952h
(70:3230h) = 52h
(70:3231h) = 49h

External Links

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