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SEX (Super FX): Difference between revisions
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''' | {| class="wikitable" style="float:right;clear:right;width:50%" | ||
!colspan="8"|Basic Info | |||
|+ | |||
|'''Addressing Mode''' | |||
|'''Opcode''' | |||
|'''Length''' | |||
|'''ROM Speed''' | |||
|'''RAM Speed''' | |||
|'''Cache Speed''' | |||
|+ | |||
|[[Implied]] (type 1) | |||
|95 | |||
|1 byte | |||
|3 cycles | |||
|3 cycles | |||
|1 cycle | |||
|} | |||
{| class="wikitable" style="float:right;clear:right;width:30%" | {| class="wikitable" style="float:right;clear:right;width:30%" | ||
!colspan="9"|Flags | !colspan="9"|Flags Affected | ||
|+ | |+ | ||
|B | |[[B Flag|B]] | ||
|ALT1 | |[[ALT1]] | ||
|ALT2 | |[[ALT2]] | ||
|O/V | |[[O/V]] | ||
|S | |[[Sign Flag|S]] | ||
|CY | |[[CY]] | ||
|Z | |[[Zero Flag|Z]] | ||
|+ | |+ | ||
|0 | |0 | ||
| Line 16: | Line 32: | ||
|0 | |0 | ||
|. | |. | ||
| | |S | ||
|. | |. | ||
| | |Z | ||
|} | |} | ||
'''SEX''' is a [[Super FX]] instruction that performs a sign extension of an 8-bit value. Bit 7 (the sign of the lower 8 bits) of the [[source register]] is copied into all the bits in the high byte of the [[destination register]]. The low byte of the source register is copied directly into the low byte of the destination register. | |||
The [[ALT0]] state is restored. | |||
The source and destination registers should be specified in advance using [[WITH]], [[FROM]], or [[TO]]. Otherwise, R<sub>0</sub> serves as the default. | |||
==== Syntax ==== | |||
<pre> | |||
SEX | |||
</pre> | |||
==== Example ==== | |||
Let: | |||
S<sub>reg</sub> : R<sub>5</sub> | |||
D<sub>reg</sub> : R<sub>1</sub> | |||
R<sub>5</sub> : 9284h | |||
After executing SEX: | |||
R<sub>1</sub> = ff84h | |||
[[File:gsu_sex.png]] | |||
=== See Also === | |||
* [[LOB]] | |||
* [[HIB]] | |||
* [[MERGE]] | |||
=== External Links === | |||
* Official Nintendo documentation on SEX: paragraph 9.80 on [https://archive.org/details/SNESDevManual/book2/page/n266 page 2-9-110 of Book II] | |||
* example: [https://archive.org/details/SNESDevManual/book2/page/n267 page 2-9-111], lbid. | |||
[[Category:ASM]] | [[Category:ASM]] | ||
[[Category: | [[Category:Super FX]] | ||
[[Category:One-byte Instructions]] | |||
[[Category:Expects Sreg/Dreg Prearranged]] | |||
Latest revision as of 19:12, 30 July 2024
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | ROM Speed | RAM Speed | Cache Speed | ||
| Implied (type 1) | 95 | 1 byte | 3 cycles | 3 cycles | 1 cycle | ||
| Flags Affected | ||||||||
|---|---|---|---|---|---|---|---|---|
| B | ALT1 | ALT2 | O/V | S | CY | Z | ||
| 0 | 0 | 0 | . | S | . | Z | ||
SEX is a Super FX instruction that performs a sign extension of an 8-bit value. Bit 7 (the sign of the lower 8 bits) of the source register is copied into all the bits in the high byte of the destination register. The low byte of the source register is copied directly into the low byte of the destination register.
The ALT0 state is restored.
The source and destination registers should be specified in advance using WITH, FROM, or TO. Otherwise, R0 serves as the default.
Syntax
SEX
Example
Let:
Sreg : R5 Dreg : R1 R5 : 9284h
After executing SEX:
R1 = ff84h
See Also
External Links
- Official Nintendo documentation on SEX: paragraph 9.80 on page 2-9-110 of Book II
- example: page 2-9-111, lbid.