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LOB (Super FX): Difference between revisions
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|'''Cache Speed''' | |'''Cache Speed''' | ||
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|[[Implied]] | |[[Implied]] (type 1) | ||
|9E | |9E | ||
|1 byte | |1 byte | ||
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|[[Sign Flag|S]] | |[[Sign Flag|S]] | ||
|[[CY]] | |[[CY]] | ||
|Z | |[[Zero Flag|Z]] | ||
|+ | |+ | ||
|0 | |0 | ||
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|0 | |0 | ||
|. | |. | ||
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|. | |. | ||
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'''LOB''' (Low Byte) is a [[Super FX]] instruction that moves the low byte of the [[source register]] into the low byte of the [[destination register]]. The high byte of the destination register is zeroed. | '''LOB''' (Low Byte) is a [[Super FX]] instruction that moves the low byte of the [[source register]] into the low byte of the [[destination register]]. The high byte of the destination register is zeroed. | ||
The [[ALT0]] state is restored. | |||
The source and destination registers should be specified in advance using [[WITH]], [[FROM]], or [[TO]]. Otherwise, R<sub>0</sub> serves as the default. | |||
==== Syntax ==== | |||
<pre> | |||
LOB | |||
</pre> | |||
==== Example ==== | |||
Let: | |||
S<sub>reg</sub> : R<sub>10</sub> | |||
D<sub>reg</sub> : R<sub>12</sub> | |||
R<sub>10</sub> = fb23h | |||
After executing LOB: | |||
R<sub>12</sub> = 0023h | |||
[[File:gsu_lob.png]] | [[File:gsu_lob.png]] | ||
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* [[HIB]] | * [[HIB]] | ||
* [[SEX]] | * [[SEX]] | ||
* [[MERGE]] | |||
* [[COLOR]] | |||
=== External Links === | === External Links === | ||
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[[Category:Byte Transfer Instructions]] | [[Category:Byte Transfer Instructions]] | ||
[[Category:One-byte Instructions]] | [[Category:One-byte Instructions]] | ||
[[Category:Expects Sreg/Dreg Prearranged]] | |||
Latest revision as of 19:27, 30 July 2024
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | ROM Speed | RAM Speed | Cache Speed | ||
| Implied (type 1) | 9E | 1 byte | 3 cycles | 3 cycles | 1 cycle | ||
| Flags Affected | ||||||||
|---|---|---|---|---|---|---|---|---|
| B | ALT1 | ALT2 | O/V | S | CY | Z | ||
| 0 | 0 | 0 | . | S | . | Z | ||
LOB (Low Byte) is a Super FX instruction that moves the low byte of the source register into the low byte of the destination register. The high byte of the destination register is zeroed.
The ALT0 state is restored.
The source and destination registers should be specified in advance using WITH, FROM, or TO. Otherwise, R0 serves as the default.
Syntax
LOB
Example
Let:
Sreg : R10 Dreg : R12 R10 = fb23h
After executing LOB:
R12 = 0023h
See Also
External Links
- Official Nintendo documentation on LOB: paragraph 9.53 on Page 2-9-75 of Book II
- example: page 2-9-76 of Book II, lbid.