We've just updated MediaWiki and its underlying software. If anything doesn't look or work quite right, please mention it to us. --RanAS

STX: Difference between revisions

From SnesLab
Jump to: navigation, search
(→‎External Links: hid archive URL for Carr)
(→‎External Links: hid archive URL for Leventhal)
Line 74: Line 74:
* [[MCS6500 Manual]] page 97 on STX: https://archive.org/details/mos_microcomputers_programming_manual/page/n115
* [[MCS6500 Manual]] page 97 on STX: https://archive.org/details/mos_microcomputers_programming_manual/page/n115
* [[Carr]], [https://archive.org/details/6502UsersManual/page/n287 page 274] on STX
* [[Carr]], [https://archive.org/details/6502UsersManual/page/n287 page 274] on STX
* [[Leventhal]] page 3-97 on STX: https://archive.org/details/6502-assembly-language-programming/page/n146
* [[Leventhal]], [https://archive.org/details/6502-assembly-language-programming/page/n146 page 3-97] on STX
* snes9x implementation of STX: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1287
* snes9x implementation of STX: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1287
* undisbeliever on STX: https://undisbeliever.net/snesdev/65816-opcodes.html#stx-store-index-register-x-to-memory
* undisbeliever on STX: https://undisbeliever.net/snesdev/65816-opcodes.html#stx-store-index-register-x-to-memory

Revision as of 20:42, 7 August 2024

Basic Info
Addressing Mode Opcode Length Speed
Absolute 8E 3 bytes 4 cycles*
Direct Page 86 2 bytes 3 cycles*
Direct Page Indexed by Y 96 2 bytes 4 cycles*
Flags Affected
N V M X D I Z C
. . . . . . . .

STX (Store X) is a 65x instruction that stores the value of the X index register.

No flags are affected.

Syntax

STX addr
STX dp
STX dp, Y
Cycle Penalties

See Also

External Links