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'''PLP''' (PulL status flags) is a 65x instruction that pulls the 8-bit value at the top of the [[stack]] into the [[status register]].
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{| class="wikitable" style="float:right;clear:right;width:30%"
!colspan="8"|Basic Info
!colspan="8"|Basic Info
|+
|+
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|'''Speed'''
|'''Speed'''
|+
|+
|stack
|[[Stack Addressing|Stack]] (Pull)
|28
|28
|1 byte
|1 byte
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|}
|}


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{| class="wikitable" style="float:right;clear:right;width:40%"
!colspan="9"|Flags Clobbered
!colspan="9"|Flags Affected
|+
|
|[[Negative Flag|N]]
|[[Overflow Flag|V]]
|[[M Flag|M]]
|[[X Flag|X]] / [[Break Flag|B]]
|[[Decimal Flag|D]]
|[[I Flag|I]]
|[[Zero Flag|Z]]
|[[Carry Flag|C]]
|+
|+
|[[65c816 native mode]]
|N
|N
|V
|V
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|C
|C
|+
|+
|
|[[6502 emulation mode]]
|
|N
|
|V
|
|.
|
|B
|
|D
|
|I
|
|Z
|C
|}
|}
'''PLP''' (PulL status flags) is a 65x instruction that pulls the 8-bit value at the top of the [[stack]] into the [[status register]].  The [[stack pointer]] is incremented before the byte is pulled.
The [[emulation mode]] bit is not on the stack so it does not get pulled.
==== Syntax ====
<pre>
PLP
</pre>
=== See Also ===
* [[PHP]]
* [[PLB]]
* [[PLD]]
* [[PLX]]
* [[PLY]]
* [[BRK]]
* [[RTI]]


=== External Links ===
=== External Links ===
* [[Eyes & Lichty]] page on PLP: https://archive.org/details/0893037893ProgrammingThe65816/page/n512
* [[Eyes & Lichty]], [https://archive.org/details/0893037893ProgrammingThe65816/page/486 page 486] on PLP
* [[Labiak]] page on PLP: https://archive.org/details/Programming_the_65816/page/n180
* [[Labiak]], [https://archive.org/details/Programming_the_65816/page/n180 page 170] on PLP
* [[MCS6500 Manual]] page on PLP: https://archive.org/details/mos_microcomputers_programming_manual/page/n142
* 8.12 on [[MCS6500 Manual]], [https://archive.org/details/mos_microcomputers_programming_manual/page/n142 page 123] on PLP
* [[Carr]] page on PLP: https://archive.org/details/6502UsersManual/page/n281
* [[Carr]], [https://archive.org/details/6502UsersManual/page/n281 page 268] on PLP
* [[Leventhal]], [https://archive.org/details/6502-assembly-language-programming/page/n133 page 3-84] on PLP
* snes9x implementation of PLP: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L2099
* Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#6.8.3


[[Category:ASM]]
[[Category:ASM]]
[[Category:Inherited from 6502]]
[[Category:Inherited from 6502]]
[[Category:Pull Instructions]]
[[Category:One-byte Instructions]]

Latest revision as of 03:56, 8 August 2024

Basic Info
Addressing Mode Opcode Length Speed
Stack (Pull) 28 1 byte 4 cycles
Flags Affected
N V M X / B D I Z C
65c816 native mode N V M X D I Z C
6502 emulation mode N V . B D I Z C

PLP (PulL status flags) is a 65x instruction that pulls the 8-bit value at the top of the stack into the status register. The stack pointer is incremented before the byte is pulled.

The emulation mode bit is not on the stack so it does not get pulled.

Syntax

PLP

See Also

External Links