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CPY: Difference between revisions
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!colspan="8"|Basic Info | !colspan="8"|Basic Info | ||
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|'''Speed''' | |'''Speed''' | ||
|+ | |+ | ||
| | |[[Immediate]] | ||
|C0 | |C0 | ||
|2 bytes | |2/3 bytes | ||
|2 cycles | |2 cycles* | ||
|+ | |+ | ||
| | |[[Absolute]] | ||
|CC | |CC | ||
|3 bytes | |3 bytes | ||
|4 cycles | |4 cycles* | ||
|+ | |+ | ||
| | |[[Direct Page Addressing|Direct Page]] | ||
|C4 | |C4 | ||
|2 bytes | |2 bytes | ||
|3 cycles | |3 cycles* | ||
|} | |} | ||
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!colspan="9"|Flags | !colspan="9"|Flags Affected | ||
|+ | |||
|[[Negative Flag|N]] | |||
|[[Overflow Flag|V]] | |||
|[[M Flag|M]] | |||
|[[X Flag|X]] | |||
|[[Decimal Flag|D]] | |||
|[[I Flag|I]] | |||
|[[Zero Flag|Z]] | |||
|[[Carry Flag|C]] | |||
|+ | |+ | ||
|N | |N | ||
|. | |. | ||
|. | |. | ||
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|. | |. | ||
|. | |. | ||
| | |Z | ||
| | |C | ||
|} | |} | ||
'''CPY''' (Compare Y) is a 65x instruction that compares the value of the [[Y index register]] to something. Internally, this is done via a subtraction, but the difference is not stored anywhere. Thus, the purpose of CPY is to setup the flags. The index register Y is the minuend. Depending on the addressing mode used, the subtrahend will be either an immediate value or the value stored at the effective address specified by the operand. The contents at the effective address (when not using immediate data) and the Y index register both remain unchanged. | |||
CPY assumes its operands are unsigned. | |||
==== Syntax ==== | |||
<pre> | |||
CPY #const | |||
CPY addr | |||
CPY dp | |||
</pre> | |||
In [[immediate addressing]], the 65c816 expects the number of bytes of immediate data to match the current size of the index registers. | |||
==== Cycle Penalties ==== | |||
* CPY takes an extra cycle in all three addressing modes when the index registers are 16 bits wide. | |||
* In [[direct page addressing]] only, CPY takes an extra cycle when the low byte of the [[direct register]] is nonzero. | |||
=== See Also === | === See Also === | ||
* [[CPX]] | * [[CPX]] | ||
* [[CMP]] | |||
* [[SBC]] | |||
=== External Links === | === External Links === | ||
* [[Eyes & Lichty]] | * [[Eyes & Lichty]], [https://archive.org/details/0893037893ProgrammingThe65816/page/450 page 450] on CPY | ||
* [[Labiak]] | * [[Labiak]], [https://archive.org/details/Programming_the_65816/page/n147 page 137] on CPY | ||
* [[MCS6500 Manual]] | * 7.9 on [[MCS6500 Manual]], [https://archive.org/details/mos_microcomputers_programming_manual/page/n117 page 99] on CPY | ||
* [[Carr]] | * [[Carr]], [https://archive.org/details/6502UsersManual/page/n270 page 257] on CPY | ||
* [[Leventhal]] | * [[Leventhal]], [https://archive.org/details/6502-assembly-language-programming/page/n108 page 3-59] on CPY | ||
* snes9x implementation of CPY: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L442 | |||
* undisbeliever on CPY: https://undisbeliever.net/snesdev/65816-opcodes.html#cpy-compare-index-register-y-with-memory | |||
* Pickens, John. http://www.6502.org/tutorials/6502opcodes.html#CPY | |||
* Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#6.1.1.2 | |||
[[Category:ASM]] | [[Category:ASM]] | ||
[[Category:Group Three Instructions]] | [[Category:Group Three Instructions]] | ||
[[Category:Inherited from 6502]] | [[Category:Inherited from 6502]] | ||
[[Category:Compare Instructions]] | |||
Latest revision as of 14:51, 8 August 2024
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Immediate | C0 | 2/3 bytes | 2 cycles* | ||||
| Absolute | CC | 3 bytes | 4 cycles* | ||||
| Direct Page | C4 | 2 bytes | 3 cycles* | ||||
| Flags Affected | ||||||||
|---|---|---|---|---|---|---|---|---|
| N | V | M | X | D | I | Z | C | |
| N | . | . | . | . | . | Z | C | |
CPY (Compare Y) is a 65x instruction that compares the value of the Y index register to something. Internally, this is done via a subtraction, but the difference is not stored anywhere. Thus, the purpose of CPY is to setup the flags. The index register Y is the minuend. Depending on the addressing mode used, the subtrahend will be either an immediate value or the value stored at the effective address specified by the operand. The contents at the effective address (when not using immediate data) and the Y index register both remain unchanged.
CPY assumes its operands are unsigned.
Syntax
CPY #const CPY addr CPY dp
In immediate addressing, the 65c816 expects the number of bytes of immediate data to match the current size of the index registers.
Cycle Penalties
- CPY takes an extra cycle in all three addressing modes when the index registers are 16 bits wide.
- In direct page addressing only, CPY takes an extra cycle when the low byte of the direct register is nonzero.
See Also
External Links
- Eyes & Lichty, page 450 on CPY
- Labiak, page 137 on CPY
- 7.9 on MCS6500 Manual, page 99 on CPY
- Carr, page 257 on CPY
- Leventhal, page 3-59 on CPY
- snes9x implementation of CPY: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L442
- undisbeliever on CPY: https://undisbeliever.net/snesdev/65816-opcodes.html#cpy-compare-index-register-y-with-memory
- Pickens, John. http://www.6502.org/tutorials/6502opcodes.html#CPY
- Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#6.1.1.2