CACHE (Super FX): Difference between revisions

Latest revision as of 01:47, 12 August 2024


Basic Info
Addressing Mode	Opcode	Length	ROM Speed	RAM Speed	Cache Speed
Implied (type 2)	02	1 byte	3 or 4 cycles	3 or 4 cycles	1 cycle


Flags Affected
B	ALT1	ALT2	O/V	S	CY	Z
0	0	0	.	.	.	.

CACHE is a Super FX instruction that might reset all cache flags. If the cache base register is equal to R₁₅ & 0fff0h, nothing happens. Otherwise, set the cache base register to R₁₅ & 0fff0h and reset all cache flags.

The ALT0 state is restored.

Syntax

CACHE

External Links

Official Nintendo documentation on CACHE: 9.27 on page 2-9-38 of Book II
cautions for 7.1.1 on page 2-7-1 of Book II

@@ Line 9: / Line 9: @@
 |'''Cache Speed'''
 |+
-|
+|[[Implied]] (type 2)
 |02
 |1 byte
@@ Line 26: / Line 26: @@
 |[[Sign Flag|S]]
 |[[CY]]
-|Z
+|[[Zero Flag|Z]]
 |+
 |0
@@ Line 37: / Line 37: @@
 |}
-'''CACHE''' is a [[Super FX]] instruction that might reset all cache flags.
+'''CACHE''' is a [[Super FX]] instruction that might reset all cache flags.  If the [[cache base register]] is equal to R<sub>15</sub> & 0fff0h, nothing happens.  Otherwise, set the cache base register to R<sub>15</sub> & 0fff0h and reset all cache flags.
+The [[ALT0]] state is restored.
+==== Syntax ====
+<pre>
+CACHE
+</pre>
 === See Also ===
 * [[Cache RAM]]
-* [[Cache Base Register]]
 === External Links ===
 * Official Nintendo documentation on CACHE: 9.27 on [https://archive.org/details/SNESDevManual/book2/page/n194 page 2-9-38 of Book II]
+* cautions for 7.1.1 on [https://archive.org/details/SNESDevManual/book2/page/n135 page 2-7-1 of Book II]
 [[Category:ASM]]