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Counter Register: Difference between revisions
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The '''Counter Register''' lives on the [[S-SMP]] at 00FDh, 00FEh, and 00FFh. Its value is indeterminate upon reset. Only the bottom 4 bits of each byte are used. | |||
=== See Also === | |||
* [[Control Register]] | |||
* [[Timer Register]] | |||
=== Reference === | === Reference === | ||
* https://archive.org/details/SNESDevManual/book1/page/n165 | * [https://archive.org/details/SNESDevManual/book1/page/n165 page 3-5-3 of Book I] of the official Super Nintendo development manual | ||
[[Category:Registers]] | [[Category:Registers]] | ||
[[Category:Audio]] | [[Category:Audio]] | ||
[[Category:SPC700]] | |||
Latest revision as of 00:02, 15 August 2024
The Counter Register lives on the S-SMP at 00FDh, 00FEh, and 00FFh. Its value is indeterminate upon reset. Only the bottom 4 bits of each byte are used.
See Also
Reference
- page 3-5-3 of Book I of the official Super Nintendo development manual