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Counter Register: Difference between revisions

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The '''Counter Register''' lives on the [[S-SMP]] at 00FDh, 00FEh, and 00FFh.  Its value is indeterminate upon reset.  Only the bottom 4 bits of each byte are used.
=== See Also ===
=== See Also ===
* [[Control Register]]
* [[Control Register]]
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[[Category:Registers]]
[[Category:Registers]]
[[Category:Audio]]
[[Category:Audio]]
[[Category:SPC700]]

Latest revision as of 00:02, 15 August 2024

The Counter Register lives on the S-SMP at 00FDh, 00FEh, and 00FFh. Its value is indeterminate upon reset. Only the bottom 4 bits of each byte are used.

See Also

Reference