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Machine Cycle: Difference between revisions
From SnesLab
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* last bullet point under 13.2 of [https://archive.org/details/SNESDevManual/book1/page/n78 page 2-13-1 of Book I] of the official Super Nintendo development manual | * last bullet point under 13.2 of [https://archive.org/details/SNESDevManual/book1/page/n78 page 2-13-1 of Book I] of the official Super Nintendo development manual | ||
* Figure 3-4-2 "Clear Timing" on [https://archive.org/details/SNESDevManual/book1/page/n161 page 3-4-1 of Book I], lbid. | * Figure 3-4-2 "Clear Timing" on [https://archive.org/details/SNESDevManual/book1/page/n161 page 3-4-1 of Book I], lbid. | ||
* Absolute Multiplication/Division on [https://archive.org/details/SNESDevManual/book1/page/n81 page 2-15-1 on Book I], lbid. | |||
* https://ersanio.gitbook.io/assembly-for-the-snes/deep-dives/cycles | * https://ersanio.gitbook.io/assembly-for-the-snes/deep-dives/cycles | ||
Revision as of 05:23, 18 August 2024
A Machine Cycle is one tick of the 5A22. It may be configured to take 6, 8, or 12 master clock cycles. In the SNES scene, we call the 6:1 configuration fastROM and the 8:1 configuration slowROM.
See Also
References
- last bullet point under 13.2 of page 2-13-1 of Book I of the official Super Nintendo development manual
- Figure 3-4-2 "Clear Timing" on page 3-4-1 of Book I, lbid.
- Absolute Multiplication/Division on page 2-15-1 on Book I, lbid.
- https://ersanio.gitbook.io/assembly-for-the-snes/deep-dives/cycles