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Break Flag: Difference between revisions
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Note: This page may be confusing or inaccurate. See the talk page. | Note: This page may be confusing or inaccurate. See the talk page. | ||
The '''Break Flag''' (B) | The '''Break Flag''' (B) is bit 4 of the [[S-SMP]]'s [[program status word]]. It discerns between [[IRQ]]s and [[BRK]]. | ||
BRK and [[PHP]]<sup>[dubious]</sup> set the break flag. IRQs, [[NMI]]s, and reset clear it.<sup>[1]</sup> | BRK and [[PHP]]<sup>[dubious]</sup> set the break flag. IRQs, [[NMI]]s, and reset clear it.<sup>[1]</sup> | ||
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In [[emulation mode]] the [[65c816]] has a break flag too.<sup>[2]</sup> But in native mode it becomes the [[Index Register Select]]. [[PLP]] can affect the break flag.<sup>[3]</sup> | In [[emulation mode]] the [[65c816]] has a break flag too.<sup>[2]</sup> But in native mode it becomes the [[Index Register Select]]. [[PLP]] can affect the break flag.<sup>[3]</sup> | ||
=== See Also === | === See Also === | ||
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# [[Eyes & Lichty]], [https://archive.org/details/0893037893ProgrammingThe65816/page/422 page 422], Table 18.2. 65x Flags. | # [[Eyes & Lichty]], [https://archive.org/details/0893037893ProgrammingThe65816/page/422 page 422], Table 18.2. 65x Flags. | ||
# [https://archive.org/details/0893037893ProgrammingThe65816/page/486 page 486], lbid. | # [https://archive.org/details/0893037893ProgrammingThe65816/page/486 page 486], lbid. | ||
# Fragment 18.1 on [https://archive.org/details/0893037893ProgrammingThe65816/page/436 page 436] on BRK, lbid. | |||
[[Category:ASM]] | |||
[[Category:SPC700]] | |||
[[Category:Flags]] | |||
[[Category:Inherited from 6502]] | |||
[[Category:Condition Codes]] |
Latest revision as of 22:21, 21 August 2024
Note: This page may be confusing or inaccurate. See the talk page.
The Break Flag (B) is bit 4 of the S-SMP's program status word. It discerns between IRQs and BRK.
BRK and PHP[dubious] set the break flag. IRQs, NMIs, and reset clear it.[1]
RETI and POP can modify the break flag.
In emulation mode the 65c816 has a break flag too.[2] But in native mode it becomes the Index Register Select. PLP can affect the break flag.[3]
See Also
References
- https://problemkaputt.de/fullsnes.htm#cpuregistersandflags
- Eyes & Lichty, page 422, Table 18.2. 65x Flags.
- page 486, lbid.
- Fragment 18.1 on page 436 on BRK, lbid.