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SBC: Difference between revisions

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* in certain addressing modes if adding an index crosses a [[page]] boundary
* in certain addressing modes if adding an index crosses a [[page]] boundary


If you only need to subtract one, consider [[DEC]] instead.
If you only need to subtract one, consider [[DEC]] instead.  Unlike the 65c02, the 65c816 does not have a cycle penalty when subtracting in decimal mode.


=== See Also ===
=== See Also ===

Revision as of 17:11, 22 October 2024

Basic Info
Addressing Mode Opcode Length Speed
Immediate E9 2/3 bytes 2 cycles*
Absolute ED 3 bytes 4 cycles*
Absolute Long EF 4 bytes 5 cycles*
Direct Page E5 2 bytes 3 cycles*
Direct Page Indirect F2 2 bytes 5 cycles*
Direct Page Indirect Long E7 2 bytes 6 cycles*
Absolute Indexed by X FD 3 bytes 4 cycles*
Absolute Long Indexed by X FF 4 bytes 5 cycles*
Absolute Indexed by Y F9 3 bytes 4 cycles*
Direct Page Indexed by X F5 2 bytes 4 cycles*
Direct Page Indexed Indirect by X E1 2 bytes 6 cycles*
Direct Page Indirect Indexed by Y F1 2 bytes 5 cycles*
Direct Page Indirect Long Indexed by Y F7 2 bytes 6 cycles*
Stack Relative E3 2 bytes 4 cycles*
Stack Relative Indirect Indexed by Y F3 2 bytes 7 cycles*
Flags Affected
N V M X D I Z C
N V . . . . Z C

SBC (Subtract with Carry/Borrow) is the main 65x subtraction instruction. The accumulator serves as both the minuend and where the difference is stored. The operand serves as the subtrahend.

If the carry flag (aka borrow flag) is clear, one more is subtracted. As there is no subtract-without-carry instruction, SEC should be run beforehand or the carry flag should otherwise be ensured to be set, otherwise the difference may be one greater than expected.

If the difference is negative, the carry flag will be cleared, otherwise it will be set.

If the decimal flag is set, then binary coded decimal subtraction is performed, otherwise binary subtraction.

Syntax

SBC #const
SBC addr
SBC long
SBC dp
SBC (dp)
SBC [dp]
SBC addr, X
SBC long, X
SBC addr, Y
SBC dp, X
SBC (dp, X)
SBC (dp), Y
SBC [dp], Y
SBC sr, S
SBC (sr, S), Y

Cycle Penalties

SBC takes an extra cycle for each of the following:

  • if the accumulator is 16 bits wide, in all addressing modes
  • when utilizing the direct register, if the low byte of the direct register is nonzero
  • in certain addressing modes if adding an index crosses a page boundary

If you only need to subtract one, consider DEC instead. Unlike the 65c02, the 65c816 does not have a cycle penalty when subtracting in decimal mode.

See Also

External Links