Program Counter: Difference between revisions

Latest revision as of 19:45, 12 November 2024

The Program Counter (PC) points to the next instruction byte to fetch. On both the 65c816 and S-SMP it is 16 bits wide. The low byte is called PCL and the high byte is called PCH.

If incremented past FFFFh, it wraps around to zero.^{[E&L, page 34]}

The 6502 had 16-bit absolute addressing but only an 8-bit adder, so in emulation mode branches that cross a page boundary incur a one cycle penalty. 65c816 native mode has no such penalty because the full 16-bit adder is used.

References

Eyes & Lichty, page 33
subparagraph 8.1.4 on page 3-8-4 of Book I of the official Super Nintendo development manual
Pickens, John. http://www.6502.org/tutorials/6502opcodes.html#PC
Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#6.2.1.1

@@ Line 1: / Line 1: @@
-The '''Program Counter''' (PC) keeps track of which instruction is currently executing.  If incremented past FFFFh, it wraps around to zero.
+The '''Program Counter''' (PC) points to the next instruction byte to fetch.  On both the [[65c816]] and [[S-SMP]] it is 16 bits wide.  The low byte is called PCL and the high byte is called PCH.
+If incremented past FFFFh, it wraps around to zero.<sup>[E&L, page 34]</sup>
 The 6502 had 16-bit absolute addressing but only an 8-bit adder, so in [[emulation mode]] branches that cross a page boundary incur a one cycle penalty.  65c816 native mode has no such penalty because the full 16-bit adder is used.
-On the [[S-SMP]] it is 16 bits wide.  The low byte is called PCL and the high byte is called PCH.
 === See Also ===
@@ Line 11: / Line 11: @@
 * [[BRA]]
 * [[JMP]]
+* [[RTS]]
+* [[RTL]]
 === References ===