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XCE: Difference between revisions
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'''XCE''' is an instruction that exchanges the [[carry]] and [[emulation]] bits. It typically appears soon after the [[Reset Vector]] following a [[CLC]], to switch the [[S-CPU]] into [[65c816 native mode]]. | '''XCE''' is an instruction that exchanges the [[carry]] and [[emulation]] bits. It typically appears soon after the [[Reset Vector]] following a [[CLC]], to switch the [[S-CPU]] into [[65c816 native mode]]. | ||
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!colspan="8"|Basic Info | |||
|+ | |||
|'''Addressing Mode''' | |||
|'''Opcode''' | |||
|'''Length''' | |||
|'''Speed''' | |||
|+ | |||
|implied | |||
|FB | |||
|1 byte | |||
|2 cycles | |||
|} | |||
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Revision as of 22:39, 30 April 2023
XCE is an instruction that exchanges the carry and emulation bits. It typically appears soon after the Reset Vector following a CLC, to switch the S-CPU into 65c816 native mode.
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| implied | FB | 1 byte | 2 cycles | ||||
| Flags Clobbered | ||||||||
|---|---|---|---|---|---|---|---|---|
| N | V | M | X | D | I | Z | C | E |