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AND1 (SPC700): Difference between revisions
From SnesLab
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|3 bytes | |3 bytes | ||
|4 cycles | |4 cycles | ||
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|6A | |6A | ||
Revision as of 05:03, 7 May 2023
AND1 is an SPC700 instruction that performs a logical AND between a memory bit and the carry flag, then stores the conjunction in the carry flag.
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| 4A | 3 bytes | 4 cycles | |||||
| 6A | 3 bytes | 4 cycles | |||||
| Flags Clobbered | |||||||
|---|---|---|---|---|---|---|---|
| N | V | P | B | H | I | Z | C |
| . | . | . | . | . | . | . | |