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AND1 (SPC700): Difference between revisions
From SnesLab
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=== See Also === | === See Also === | ||
* [[OR1]] | * [[OR1]] | ||
=== External Links === | |||
* Official Nintendo documentation on AND1: https://archive.org/details/SNESDevManual/book1/page/n234 | |||
[[Category:ASM]] | [[Category:ASM]] | ||
[[Category:SPC700]] | [[Category:SPC700]] | ||
[[Category:Bit Operation Commands]] | [[Category:Bit Operation Commands]] | ||
Revision as of 03:11, 17 May 2023
AND1 is an SPC700 instruction that performs a logical AND between a memory bit and the carry flag, then stores the conjunction in the carry flag.
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| 4A | 3 bytes | 4 cycles | |||||
| 6A | 3 bytes | 4 cycles | |||||
| Flags Clobbered | |||||||
|---|---|---|---|---|---|---|---|
| N | V | P | B | H | I | Z | C |
| . | . | . | . | . | . | . | |
See Also
External Links
- Official Nintendo documentation on AND1: https://archive.org/details/SNESDevManual/book1/page/n234