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PLP: Difference between revisions

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* [[Carr]] page on PLP: https://archive.org/details/6502UsersManual/page/n281
* [[Carr]] page on PLP: https://archive.org/details/6502UsersManual/page/n281
* [[Leventhal]] page on PLP: https://archive.org/details/6502-assembly-language-programming/page/n133
* [[Leventhal]] page on PLP: https://archive.org/details/6502-assembly-language-programming/page/n133
* snes9x implementation of PLP: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1921


[[Category:ASM]]
[[Category:ASM]]
[[Category:Inherited from 6502]]
[[Category:Inherited from 6502]]

Revision as of 19:59, 17 May 2023

PLP (PulL status flags) is a 65x instruction that pulls the 8-bit value at the top of the stack into the status register.

Basic Info
Addressing Mode Opcode Length Speed
stack 28 1 byte 4 cycles
Flags Clobbered
N V M X D I Z C

External Links