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Cache RAM: Difference between revisions
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'''Cache RAM''' is a region of 512 bytes on the [[Super FX]]. Access to it is six times faster than [[Game Pak ROM]] or [[Game Pak RAM]].<sup>1</sup> It is divided into 32 blocks, each block being 16 bytes.<sup>2</sup> | '''Cache RAM''' is a region of 512 bytes on the [[Super FX]]. Access to it is six times faster than [[Game Pak ROM]] or [[Game Pak RAM]].<sup>1</sup> It is divided into 32 blocks, each block being 16 bytes.<sup>2</sup> | ||
On the S-CPU, it is mapped to $xx:3100-$xx:32FF ($xx = $00-$3F, $80-$BF).<sup>3</sup> | |||
=== See Also === | === See Also === | ||
* [[CACHE]] | * [[CACHE]] | ||
* [[LJMP (Super FX)]] | |||
=== | === References === | ||
# [https://archive.org/details/SNESDevManual/book2/page/n131 page 2-6-9 of Book II] of the official Super Nintendo development manual | # [https://archive.org/details/SNESDevManual/book2/page/n131 page 2-6-9 of Book II] of the official Super Nintendo development manual | ||
# [https://archive.org/details/SNESDevManual/book2/page/n132 page 2-6-10 of Book II] of the official Super Nintendo development manual | # [https://archive.org/details/SNESDevManual/book2/page/n132 page 2-6-10 of Book II] of the official Super Nintendo development manual | ||
# Cache RAM Access From The Super NES. [https://archive.org/details/SNESDevManual/book2/page/n133 page 2-6-12 of Book II] of the official Super Nintendo development manual | |||
# Execution in Cache RAM. [https://archive.org/details/SNESDevManual/book2/page/n123 page 2-6-1 of Book II] of the official Super Nintendo development manual | |||
[[Category:SNES Hardware]] | [[Category:SNES Hardware]] | ||
[[Category:Super FX]] | |||
[[Category:Address Spaces]] | |||
Latest revision as of 12:16, 29 November 2023
Cache RAM is a region of 512 bytes on the Super FX. Access to it is six times faster than Game Pak ROM or Game Pak RAM.1 It is divided into 32 blocks, each block being 16 bytes.2
On the S-CPU, it is mapped to $xx:3100-$xx:32FF ($xx = $00-$3F, $80-$BF).3
See Also
References
- page 2-6-9 of Book II of the official Super Nintendo development manual
- page 2-6-10 of Book II of the official Super Nintendo development manual
- Cache RAM Access From The Super NES. page 2-6-12 of Book II of the official Super Nintendo development manual
- Execution in Cache RAM. page 2-6-1 of Book II of the official Super Nintendo development manual