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|[[Immediate]]
|[[Immediate]]
|09
|09
|2 bytes
|2/3 bytes
|2 cycles*
|2 cycles*
|+
|+
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|6 cycles*
|6 cycles*
|+
|+
|absolute indexed by X
|[[Absolute Indexed by X]]
|1D
|1D
|3 bytes
|3 bytes
|4 cycles*
|4 cycles*
|+
|+
|absolute long indexed by X
|[[Absolute Long Indexed by X]]
|1F
|1F
|4 bytes
|4 bytes
|5 cycles*
|5 cycles*
|+
|+
|absolute indexed by Y
|[[Absolute Indexed by Y]]
|19
|19
|3 bytes
|3 bytes
|4 cycles*
|4 cycles*
|+
|+
|direct page indexed by X
|[[Direct Page Indexed by X]]
|15
|15
|2 bytes
|2 bytes
|4 cycles*
|4 cycles*
|+
|+
|direct page indexed indirect by X
|[[Direct Page Indexed Indirect by X]]
|01
|01
|2 bytes
|2 bytes
|6 cycles*
|6 cycles*
|+
|+
|direct page indirect indexed by Y
|[[Direct Page Indirect Indexed by Y]]
|11
|11
|2 bytes
|2 bytes
|5 cycles*
|5 cycles*
|+
|+
|direct page indirect long indexed by Y
|[[Direct Page Indirect Long Indexed by Y]]
|17
|17
|2 bytes
|2 bytes
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|4 cycles*
|4 cycles*
|+
|+
|stack relative indirect indexed by Y
|[[Stack Relative Indirect Indexed by Y]]
|13
|13
|2 bytes
|2 bytes
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|[[Carry Flag|C]]
|[[Carry Flag|C]]
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|+
|
|N
|.
|.
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'''ORA''' is a 65x instruction that performs a logical OR and stores the result in the [[accumulator]].
'''ORA''' is a 65x instruction that performs a logical OR between the datum at the effective address and the [[accumulator]] and stores the disjunction in the accumulator.  The size of the accumulator determines whether 8 or 16 bits are ORed.
 
==== Syntax ====
<pre>
ORA #const
ORA addr
ORA long
ORA dp
ORA (dp)
ORA [dp]
ORA addr, X
ORA long, X
ORA addr, Y
ORA dp, X
ORA (dp, X)
ORA (dp), Y
ORA [dp], Y
ORA sr, S
ORA (sr, S), Y
</pre>


===== Cycle Penalties =====
==== Cycle Penalties ====
* In all [[addressing modes]], ORA takes one extra cycle when the accumulator is 16 bits wide.
* In all [[addressing modes]], ORA takes one extra cycle when the accumulator is 16 bits wide.
* In [[direct page addressing]] modes, ORA takes another extra cycle if the low byte of the [[direct page register]] is nonzero.
* In [[direct page addressing]] modes, ORA takes another extra cycle if the low byte of the [[direct page register]] is nonzero.
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* [[AND]]
* [[AND]]
* [[EOR]]
* [[EOR]]
* [[OR (Super FX)]]
* [[XOR (Super FX)]]


=== External Links ===
=== External Links ===
* [[Eyes & Lichty]] page 471, on ORA: https://archive.org/details/0893037893ProgrammingThe65816/page/n497
* [[Eyes & Lichty]], [https://archive.org/details/0893037893ProgrammingThe65816/page/471 page 471] on ORA
* [[Labiak]] page 156 on ORA: https://archive.org/details/Programming_the_65816/page/n166
* [[Labiak]], [https://archive.org/details/Programming_the_65816/page/n166 page 156] on ORA
* [[MCS6500 Manual]] page on ORA: https://archive.org/details/mos_microcomputers_programming_manual/page/n36
* 2.2.4.2 on [[MCS6500 Manual]], [https://archive.org/details/mos_microcomputers_programming_manual/page/n36 page 21] on ORA
* [[Carr]] page 266 on ORA: https://archive.org/details/6502UsersManual/page/n279
* [[Carr]], [https://archive.org/details/6502UsersManual/page/n279 page 266] on ORA
* [[Leventhal]] page 3-79 on ORA: https://archive.org/details/6502-assembly-language-programming/page/n128
* [[Leventhal]], [https://archive.org/details/6502-assembly-language-programming/page/n128 page 3-79] on ORA
* snes9x implementation of ORA: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L917
* snes9x implementation of ORA: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L917
* undisbeliever on ORA: https://undisbeliever.net/snesdev/65816-opcodes.html#ora-or-accumulator-with-memory
* undisbeliever on ORA: https://undisbeliever.net/snesdev/65816-opcodes.html#ora-or-accumulator-with-memory
* Pickens, John. http://www.6502.org/tutorials/6502opcodes.html#ORA
* Bruce, Clark. http://www.6502.org/tutorials/65c816opcodes.html#6.1.2.1


[[Category:ASM]]
[[Category:ASM]]
[[Category:Group One Instructions]]
[[Category:Group One Instructions]]
[[Category:Inherited from 6502]]
[[Category:Inherited from 6502]]

Latest revision as of 17:46, 23 August 2024

Basic Info
Addressing Mode Opcode Length Speed
Immediate 09 2/3 bytes 2 cycles*
Absolute 0D 3 bytes 4 cycles*
Absolute Long 0F 4 bytes 5 cycles*
Direct Page 05 2 bytes 3 cycles*
Direct Page Indirect 12 2 bytes 5 cycles*
Direct Page Indirect Long 07 2 bytes 6 cycles*
Absolute Indexed by X 1D 3 bytes 4 cycles*
Absolute Long Indexed by X 1F 4 bytes 5 cycles*
Absolute Indexed by Y 19 3 bytes 4 cycles*
Direct Page Indexed by X 15 2 bytes 4 cycles*
Direct Page Indexed Indirect by X 01 2 bytes 6 cycles*
Direct Page Indirect Indexed by Y 11 2 bytes 5 cycles*
Direct Page Indirect Long Indexed by Y 17 2 bytes 6 cycles*
Stack Relative 03 2 bytes 4 cycles*
Stack Relative Indirect Indexed by Y 13 2 bytes 7 cycles*
Flags Affected
N V M X D I Z C
N . . . . . Z .

ORA is a 65x instruction that performs a logical OR between the datum at the effective address and the accumulator and stores the disjunction in the accumulator. The size of the accumulator determines whether 8 or 16 bits are ORed.

Syntax

ORA #const
ORA addr
ORA long
ORA dp
ORA (dp)
ORA [dp]
ORA addr, X
ORA long, X
ORA addr, Y
ORA dp, X
ORA (dp, X)
ORA (dp), Y
ORA [dp], Y
ORA sr, S
ORA (sr, S), Y

Cycle Penalties

See Also

External Links

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