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Program Counter: Difference between revisions

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The '''Program Counter''' keeps track of which instruction is currently executing.
The '''Program Counter''' (PC) points to the next instruction byte to fetch.  On both the [[65c816]] and [[S-SMP]] it is 16 bits wide.  The low byte is called PCL and the high byte is called PCH.


On the [[S-SMP]] it is 16 bits wide.
If incremented past FFFFh, it wraps around to zero.<sup>[E&L, page 34]</sup>
 
The 6502 had 16-bit absolute addressing but only an 8-bit adder, so in [[emulation mode]] branches that cross a page boundary incur a one cycle penalty.  65c816 native mode has no such penalty because the full 16-bit adder is used.


=== See Also ===
=== See Also ===
* [[Program Bank Register]]
* [[Program Bank Register]]
* [[Stack Pointer]]
* [[Stack Pointer]]
* [[Super_FX#Program_Counter_(R15)]]
* [[BRA]]
* [[JMP]]
* [[RTS]]
* [[RTL]]


=== Reference ===
=== References ===
* [[Eyes & Lichty]] page 33, https://archive.org/details/0893037893ProgrammingThe65816/page/n59
* [[Eyes & Lichty]], [https://archive.org/details/0893037893ProgrammingThe65816/page/33 page 33]
* [https://archive.org/details/SNESDevManual/book1/page/n182 page 3-8-4 of Book I] of the official Super Nintendo development manual
* subparagraph 8.1.4 on [https://archive.org/details/SNESDevManual/book1/page/n182 page 3-8-4 of Book I] of the official Super Nintendo development manual
* Pickens, John. http://www.6502.org/tutorials/6502opcodes.html#PC
* Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#6.2.1.1


[[Category:ASM]]
[[Category:ASM]]
[[Category:Registers]]
[[Category:Registers]]
[[Category:Inherited from 6502]]
[[Category:Inherited from 6502]]

Latest revision as of 19:45, 12 November 2024

The Program Counter (PC) points to the next instruction byte to fetch. On both the 65c816 and S-SMP it is 16 bits wide. The low byte is called PCL and the high byte is called PCH.

If incremented past FFFFh, it wraps around to zero.[E&L, page 34]

The 6502 had 16-bit absolute addressing but only an 8-bit adder, so in emulation mode branches that cross a page boundary incur a one cycle penalty. 65c816 native mode has no such penalty because the full 16-bit adder is used.

See Also

References