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MERGE (Super FX): Difference between revisions
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!colspan="8"|Basic Info | !colspan="8"|Basic Info | ||
|+ | |+ | ||
|'''Addressing Mode''' | |||
|'''Opcode''' | |'''Opcode''' | ||
|'''Length''' | |'''Length''' | ||
| Line 8: | Line 9: | ||
|'''Cache Speed''' | |'''Cache Speed''' | ||
|+ | |+ | ||
|[[Implied]] (type 1) | |||
|70 | |70 | ||
|1 byte | |1 byte | ||
| Line 22: | Line 24: | ||
|[[ALT2]] | |[[ALT2]] | ||
|[[O/V]] | |[[O/V]] | ||
|S | |[[Sign Flag|S]] | ||
|[[CY]] | |[[CY]] | ||
|Z | |[[Zero Flag|Z]] | ||
|+ | |+ | ||
|0 | |0 | ||
|0 | |0 | ||
|0 | |0 | ||
| | |O/V | ||
| | |S | ||
| | |CY | ||
| | |Z | ||
|} | |} | ||
'''MERGE''' is a [[Super FX]] instruction that merges the high | '''MERGE''' is a [[Super FX]] instruction that merges the high bytes of two specific general registers into the [[destination register]]. | ||
The high byte of D<sub>reg</sub> comes from R<sub>7</sub>. | |||
The low byte of D<sub>reg</sub> comes from R<sub>8</sub>. | |||
The official documentation has several bits labeled "B" not 'D" below the "Flags affected" table.<sup>[1]</sup> | |||
The [[ALT0]] state is restored. | |||
The destination register should be specified in advance using [[WITH]] or [[TO]]. Otherwise, R<sub>0</sub> serves as the default. The [[source register]] is ignored. | |||
==== Syntax ==== | |||
<pre> | |||
MERGE | |||
</pre> | |||
==== Example ==== | |||
Let: | |||
D<sub>reg</sub> : R<sub>9</sub> | |||
R<sub>7</sub> = 05aah | |||
R<sub>8</sub> = fc33h | |||
After executing MERGE: | |||
R<sub>9</sub> = 05fch | |||
and the sign, overflow, carry, and zero flags are set | |||
[[File:gsu_merge.png]] | |||
=== See Also === | |||
* [[HIB]] | |||
* [[LOB]] | |||
* [[SEX]] | |||
=== External Links === | === External Links === | ||
* Official Nintendo documentation on MERGE: [https://archive.org/details/SNESDevManual/book2/page/n235 | * Official Nintendo documentation on MERGE: paragraph 9.56 on [https://archive.org/details/SNESDevManual/book2/page/n235 page 2-9-79 of Book II] | ||
* example: [https://archive.org/details/SNESDevManual/book2/page/n236 page 2-9-80 of Book II], lbid. | * example: [https://archive.org/details/SNESDevManual/book2/page/n236 page 2-9-80 of Book II], lbid. | ||
| Line 48: | Line 77: | ||
[[Category:Byte Transfer Instructions]] | [[Category:Byte Transfer Instructions]] | ||
[[Category:One-byte Instructions]] | [[Category:One-byte Instructions]] | ||
[[Category:Expects Sreg/Dreg Prearranged]] | |||
Latest revision as of 20:23, 30 July 2024
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | ROM Speed | RAM Speed | Cache Speed | ||
| Implied (type 1) | 70 | 1 byte | 3 cycles | 3 cycles | 1 cycle | ||
| Flags Affected | ||||||||
|---|---|---|---|---|---|---|---|---|
| B | ALT1 | ALT2 | O/V | S | CY | Z | ||
| 0 | 0 | 0 | O/V | S | CY | Z | ||
MERGE is a Super FX instruction that merges the high bytes of two specific general registers into the destination register.
The high byte of Dreg comes from R7. The low byte of Dreg comes from R8.
The official documentation has several bits labeled "B" not 'D" below the "Flags affected" table.[1]
The ALT0 state is restored.
The destination register should be specified in advance using WITH or TO. Otherwise, R0 serves as the default. The source register is ignored.
Syntax
MERGE
Example
Let:
Dreg : R9 R7 = 05aah R8 = fc33h
After executing MERGE:
R9 = 05fch
and the sign, overflow, carry, and zero flags are set
See Also
External Links
- Official Nintendo documentation on MERGE: paragraph 9.56 on page 2-9-79 of Book II
- example: page 2-9-80 of Book II, lbid.