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RAMB (Super FX): Difference between revisions
From SnesLab
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|[[Sign Flag|S]] | |[[Sign Flag|S]] | ||
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'''RAMB''' is a [[Super FX]] instruction that moves the low byte of the [[source register]] into [[RAMBR]]. | '''RAMB''' is a [[Super FX]] instruction that moves the low byte of the [[source register]] into [[RAMBR]]. | ||
The source register should be specified in advance using [[WITH]] or [[FROM]]. Otherwise, R<sub>0</sub> serves as the default. | |||
The [[ALT0]] state is restored. | |||
==== Syntax ==== | |||
<pre> | |||
RAMB | |||
</pre> | |||
==== Example ==== | |||
Let: | |||
S<sub>reg</sub> : R<sub>3</sub> | |||
R<sub>3</sub> = 0170h | |||
After executing RAMB, the RAM bank register becomes 70h. | |||
=== See Also === | === See Also === | ||
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* [[ALT2]] | * [[ALT2]] | ||
* [[SMS]] | * [[SMS]] | ||
* [[SM]] | |||
=== External Links === | === External Links === | ||
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[[Category:Bank Set-up Instructions]] | [[Category:Bank Set-up Instructions]] | ||
[[Category:Two-byte Instructions]] | [[Category:Two-byte Instructions]] | ||
[[Category:Expects Sreg/Dreg Prearranged]] |
Latest revision as of 00:20, 13 July 2024
Basic Info | |||||||
---|---|---|---|---|---|---|---|
Addressing Mode | Opcode | Length | ROM Speed | RAM Speed | Cache Speed | ||
Implied (type 1) | 3EDF | 2 bytes | 6 cycles | 6 cycles | 2 cycles |
Flags Affected | ||||||||
---|---|---|---|---|---|---|---|---|
B | ALT1 | ALT2 | O/V | S | CY | Z | ||
0 | 0 | 0 | . | . | . | . |
RAMB is a Super FX instruction that moves the low byte of the source register into RAMBR.
The source register should be specified in advance using WITH or FROM. Otherwise, R0 serves as the default.
The ALT0 state is restored.
Syntax
RAMB
Example
Let:
Sreg : R3 R3 = 0170h
After executing RAMB, the RAM bank register becomes 70h.
See Also
External Links
- Official Nintendo documentation on RAMB: 9.73 on Page 2-9-101 of Book II