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SM (Super FX): Difference between revisions
From SnesLab
(The ALT0 state is restored.) |
(→See Also: LM, LMS) |
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|'''Cache Speed''' | |'''Cache Speed''' | ||
|+ | |+ | ||
| | |[[Implied Indirect]] | ||
|3EFnxxxx | |3EFnxxxx | ||
|4 bytes | |4 bytes | ||
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|[[Sign Flag|S]] | |[[Sign Flag|S]] | ||
|[[CY]] | |[[CY]] | ||
|Z | |[[Zero Flag|Z]] | ||
|+ | |+ | ||
|0 | |0 | ||
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|} | |} | ||
'''SM''' is a [[Super FX]] instruction that stores a value to the [[Game Pak]]. | '''SM''' (Store to raM) is a [[Super FX]] instruction that stores a value to the [[Game Pak]]. The bank must be specified with [[RAMB]]. | ||
The number of cycles varies because of the [[RAM buffer]]. | The number of cycles varies because of the [[RAM buffer]]. | ||
| Line 58: | Line 58: | ||
=== See Also === | === See Also === | ||
* [[SMS]] | * [[SMS]] | ||
* [[ | * [[LM (Super FX)|LM]] | ||
* [[LMS]] | |||
* [[ALT2]] | * [[ALT2]] | ||
Latest revision as of 05:46, 16 July 2024
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | ROM Speed | RAM Speed | Cache Speed | ||
| Implied Indirect | 3EFnxxxx | 4 bytes | 12 to 17 cycles | 16 to 20 cycles | 4 to 9 cycles | ||
| Flags Affected | ||||||||
|---|---|---|---|---|---|---|---|---|
| B | ALT1 | ALT2 | O/V | S | CY | Z | ||
| 0 | 0 | 0 | . | . | . | . | ||
SM (Store to raM) is a Super FX instruction that stores a value to the Game Pak. The bank must be specified with RAMB.
The number of cycles varies because of the RAM buffer.
The ALT0 state is restored.
Syntax
SM (xx), Rn
Example
Let:
R4 = 438ch RAMBR = 70h
After executing SM (0b492h), R4:
(70:b492h) = 8ch (70:b493h) = 43h
See Also
External Links
- Official Nintendo documentation on SM: 9.81 on page 2-9-112 of Book II