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FastROM: Difference between revisions

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'''FastROM''' is 3.58 MHz.  It is about 33% faster than [[SlowROM]].  FastROM is a property of the ROM chip itself and not the board it is soldered onto.<sup>[2]</sup>  When the [[5A22]] is operating at fastROM, there are 6 CPU cycles per [[master clock]] cycle.
'''FastROM''' is 3.58 MHz and its ROM access speed is 120ns.  It is about 33% faster than [[SlowROM]].  FastROM is a property of the ROM chip itself and not the board it is soldered onto.<sup>[2]</sup>  When the [[5A22]] is operating at fastROM speed, there are 6 [[master clock]] cycles per CPU [[machine cycles]].


FastROM speeds only apply to the upper halves of banks $80-bf and all of banks $c0-ff.<sup>[1]</sup>
FastROM speeds only apply to the upper halves of banks $80-bf and all of banks $c0-ff.<sup>[1]</sup>


The [[SAS]] cannot use FastROM.<sup>[3]</sup>
The [[SAS]] cannot use FastROM.<sup>[3]</sup> Games which utilize fastrom should indicate this at bit 4 of FFD5 of the cartridge header.<sup>[4]</sup>
 
[[File:master_clock_divider_speeds.png]]


=== See Also ===
=== See Also ===
* [[List of FastROM Games]]
* [[List of FastROM Games]]
* [[420Dh]]


=== External Links ===
=== External Links ===
* https://gbatemp.net/threads/romhacker-kandowontu-converts-more-than-80-snes-titles-into-fastrom-improving-their-performance.629133
* https://gbatemp.net/threads/romhacker-kandowontu-converts-more-than-80-snes-titles-into-fastrom-improving-their-performance.629133
* "High Speed Required?" checkbox on [https://archive.org/details/SNESDevManual/book1/page/n26 page 1-2-9 of Book I] of the official Super Nintendo development manual
* "High Speed Required?" checkbox on [https://archive.org/details/SNESDevManual/book1/page/n26 page 1-2-9 of Book I] of the official Super Nintendo development manual
=== References ===
=== References ===
# Near, https://forums.nesdev.org/viewtopic.php?t=9585
# Near, https://forums.nesdev.org/viewtopic.php?t=9585
# Bregalad, lbid.
# Bregalad, lbid.
# caution 3.3.6.1 on page 1-3-4 of Book II of the official Super Nintendo development manual
# caution 3.3.6.1 on [https://archive.org/details/SNESDevManual/book2/page/n20 page 1-3-4 of Book II] of the official Super Nintendo development manual
# http://problemkaputt.de/fullsnes.htm#snesmemorycontrol


[[Category:SNES Hardware]]
[[Category:SNES Hardware]]
[[Category:Scene Slang]]
[[Category:Scene Slang]]
[[Category:Timing]]

Latest revision as of 17:08, 19 August 2024

FastROM is 3.58 MHz and its ROM access speed is 120ns. It is about 33% faster than SlowROM. FastROM is a property of the ROM chip itself and not the board it is soldered onto.[2] When the 5A22 is operating at fastROM speed, there are 6 master clock cycles per CPU machine cycles.

FastROM speeds only apply to the upper halves of banks $80-bf and all of banks $c0-ff.[1]

The SAS cannot use FastROM.[3] Games which utilize fastrom should indicate this at bit 4 of FFD5 of the cartridge header.[4]

master clock divider speeds.png

See Also

External Links

References

  1. Near, https://forums.nesdev.org/viewtopic.php?t=9585
  2. Bregalad, lbid.
  3. caution 3.3.6.1 on page 1-3-4 of Book II of the official Super Nintendo development manual
  4. http://problemkaputt.de/fullsnes.htm#snesmemorycontrol