We've just updated MediaWiki and its underlying software. If anything doesn't look or work quite right, please mention it to us. --RanAS
Program Counter: Difference between revisions
From SnesLab
(→See Also: BRA, JMP) |
(→See Also: RTS, RTL) |
||
| (9 intermediate revisions by the same user not shown) | |||
| Line 1: | Line 1: | ||
The '''Program Counter''' (PC) keeps track of which instruction is currently executing. | The '''Program Counter''' (PC) keeps track of which instruction is currently executing. On both the [[65c816]] and [[S-SMP]] it is 16 bits wide. The low byte is called PCL and the high byte is called PCH. | ||
If incremented past FFFFh, it wraps around to zero.<sup>[E&L, page 34]</sup> | |||
The 6502 had 16-bit absolute addressing but only an 8-bit adder, so in [[emulation mode]] branches that cross a page boundary incur a one cycle penalty. 65c816 native mode has no such penalty because the full 16-bit adder is used. | |||
=== See Also === | === See Also === | ||
| Line 9: | Line 11: | ||
* [[BRA]] | * [[BRA]] | ||
* [[JMP]] | * [[JMP]] | ||
* [[RTS]] | |||
* [[RTL]] | |||
=== References === | === References === | ||
* [[Eyes & Lichty]] | * [[Eyes & Lichty]], [https://archive.org/details/0893037893ProgrammingThe65816/page/33 page 33] | ||
* subparagraph 8.1.4 on [https://archive.org/details/SNESDevManual/book1/page/n182 page 3-8-4 of Book I] of the official Super Nintendo development manual | * subparagraph 8.1.4 on [https://archive.org/details/SNESDevManual/book1/page/n182 page 3-8-4 of Book I] of the official Super Nintendo development manual | ||
* Pickens, John. http://www.6502.org/tutorials/6502opcodes.html#PC | |||
* Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#6.2.1.1 | |||
[[Category:ASM]] | [[Category:ASM]] | ||
[[Category:Registers]] | [[Category:Registers]] | ||
[[Category:Inherited from 6502]] | [[Category:Inherited from 6502]] | ||
Latest revision as of 20:42, 10 August 2024
The Program Counter (PC) keeps track of which instruction is currently executing. On both the 65c816 and S-SMP it is 16 bits wide. The low byte is called PCL and the high byte is called PCH.
If incremented past FFFFh, it wraps around to zero.[E&L, page 34]
The 6502 had 16-bit absolute addressing but only an 8-bit adder, so in emulation mode branches that cross a page boundary incur a one cycle penalty. 65c816 native mode has no such penalty because the full 16-bit adder is used.
See Also
References
- Eyes & Lichty, page 33
- subparagraph 8.1.4 on page 3-8-4 of Book I of the official Super Nintendo development manual
- Pickens, John. http://www.6502.org/tutorials/6502opcodes.html#PC
- Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#6.2.1.1