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CPX: Difference between revisions
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In [[immediate addressing]], the 65c816 expects the number of bytes of immediate data to match the current size of the index registers. | |||
==== Cycle Penalties ==== | ==== Cycle Penalties ==== | ||
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=== External Links === | === External Links === | ||
* [[Eyes & Lichty]] | * [[Eyes & Lichty]], [https://archive.org/details/0893037893ProgrammingThe65816/page/449 page 449] on CPX | ||
* [[Labiak]] | * [[Labiak]], [https://archive.org/details/Programming_the_65816/page/n146 page 136] on CPX | ||
* [[MCS6500 Manual]] | * 7.8 on [[MCS6500 Manual]], [https://archive.org/details/mos_microcomputers_programming_manual/page/n117 page 99] on CPX | ||
* [[Carr]] | * [[Carr]], [https://archive.org/details/6502UsersManual/page/n269 page 256] on CPX | ||
* [[Leventhal]] | * [[Leventhal]], [https://archive.org/details/6502-assembly-language-programming/page/n107 page 3-58] on CPX | ||
* snes9x implementation of CPX: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L402 | * snes9x implementation of CPX: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L402 | ||
* undisbeliever on CPX: https://undisbeliever.net/snesdev/65816-opcodes.html#cpx-compare-index-register-x-with-memory | * undisbeliever on CPX: https://undisbeliever.net/snesdev/65816-opcodes.html#cpx-compare-index-register-x-with-memory | ||
* Pickens, John. http://www.6502.org/tutorials/6502opcodes.html#CPX | * Pickens, John. http://www.6502.org/tutorials/6502opcodes.html#CPX | ||
* Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#6.1.1.2 | |||
[[Category:ASM]] | [[Category:ASM]] | ||
[[Category:Group Three Instructions]] | [[Category:Group Three Instructions]] | ||
[[Category:Inherited from 6502]] | [[Category:Inherited from 6502]] | ||
[[Category:Compare Instructions]] |
Latest revision as of 14:49, 8 August 2024
Basic Info | |||||||
---|---|---|---|---|---|---|---|
Addressing Mode | Opcode | Length | Speed | ||||
Immediate | E0 | 2/3 bytes | 2 cycles* | ||||
Absolute | EC | 3 bytes | 4 cycles* | ||||
Direct Page | E4 | 2 bytes | 3 cycles* |
Flags Affected | ||||||||
---|---|---|---|---|---|---|---|---|
N | V | M | X | D | I | Z | C | |
N | . | . | . | . | . | Z | C |
CPX (Compare X) is a 65x instruction that compares the value of the X index register to something. Internally, this is done via a subtraction, but the difference is not stored anywhere. Thus, the purpose of CPX is to setup the flags. The index register X is the minuend. Depending on the addressing mode used, the subtrahend will be either an immediate value or the value stored at the effective address specified by the operand. The contents at the effective address (when not using immediate data) and the X index register both remain unchanged.
CPX assumes its operands are unsigned.
Syntax
CPX #const CPX addr CPX dp
In immediate addressing, the 65c816 expects the number of bytes of immediate data to match the current size of the index registers.
Cycle Penalties
- CPX takes an extra cycle in all three addressing modes when the index registers are 16 bits wide.
- In direct page addressing only, CPX takes an extra cycle when the low byte of the direct register is nonzero.
See Also
External Links
- Eyes & Lichty, page 449 on CPX
- Labiak, page 136 on CPX
- 7.8 on MCS6500 Manual, page 99 on CPX
- Carr, page 256 on CPX
- Leventhal, page 3-58 on CPX
- snes9x implementation of CPX: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L402
- undisbeliever on CPX: https://undisbeliever.net/snesdev/65816-opcodes.html#cpx-compare-index-register-x-with-memory
- Pickens, John. http://www.6502.org/tutorials/6502opcodes.html#CPX
- Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#6.1.1.2