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Program Counter: Difference between revisions

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The '''Program Counter''' (PC) keeps track of which instruction is currently executing.  If incremented past FFFFh, it wraps around to zero.
The '''Program Counter''' (PC) points to the next instruction byte to fetch.  On both the [[65c816]] and [[S-SMP]] it is 16 bits wideThe low byte is called PCL and the high byte is called PCH.
 
If incremented past FFFFh, it wraps around to zero.<sup>[E&L, page 34]</sup>


The 6502 had 16-bit absolute addressing but only an 8-bit adder, so in [[emulation mode]] branches that cross a page boundary incur a one cycle penalty.  65c816 native mode has no such penalty because the full 16-bit adder is used.
The 6502 had 16-bit absolute addressing but only an 8-bit adder, so in [[emulation mode]] branches that cross a page boundary incur a one cycle penalty.  65c816 native mode has no such penalty because the full 16-bit adder is used.
On the [[S-SMP]] it is 16 bits wide.  The low byte is called PCL and the high byte is called PCH.


=== See Also ===
=== See Also ===
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* [[BRA]]
* [[BRA]]
* [[JMP]]
* [[JMP]]
* [[RTS]]
* [[RTL]]


=== References ===
=== References ===

Latest revision as of 19:45, 12 November 2024

The Program Counter (PC) points to the next instruction byte to fetch. On both the 65c816 and S-SMP it is 16 bits wide. The low byte is called PCL and the high byte is called PCH.

If incremented past FFFFh, it wraps around to zero.[E&L, page 34]

The 6502 had 16-bit absolute addressing but only an 8-bit adder, so in emulation mode branches that cross a page boundary incur a one cycle penalty. 65c816 native mode has no such penalty because the full 16-bit adder is used.

See Also

References