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Indirect Addressing: Difference between revisions

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'''Indirect Addressing''' is supported by some one-byte [[SPC700]] instructions when the [[accumulator]] is usually the first operand in the assembler source and the other operand is the [[X index register]], which is interpreted as a pointer:
'''Indirect Addressing''' is used by some one-byte [[SPC700]] instructions.  Usually, the [[accumulator]] appears as the first operand in the assembler source, with the other operand being the [[X index register]], which is interpreted as a pointer.  These eight opcodes use indirect addressing:


* [[MOV]] (opcodes E6 and C6)
* [[MOV]] (opcodes E6 and C6)

Latest revision as of 05:43, 5 January 2025

Indirect Addressing is used by some one-byte SPC700 instructions. Usually, the accumulator appears as the first operand in the assembler source, with the other operand being the X index register, which is interpreted as a pointer. These eight opcodes use indirect addressing:

  • MOV (opcodes E6 and C6)
  • AND (opcode 26)
  • OR (opcode 06)
  • EOR (opcode 46)
  • ADC (opcode 86)
  • SBC (opcode A6)
  • CMP (opcode 66)

In the above list, MOV is the only mnemonic that can take the accumulator as the second operand.

Some of the above mnemonics have an opcode where both operands utilize indirect addressing, in which case the whole instruction is considered to use Indirect Page to I.P. Addressing.

Symbol

(X)

See Also

References