We've just updated MediaWiki and its underlying software. If anything doesn't look or work quite right, please mention it to us. --RanAS
CACHE (Super FX): Difference between revisions
From SnesLab
(created page) |
(→External Links: cautions) |
||
| (26 intermediate revisions by the same user not shown) | |||
| Line 1: | Line 1: | ||
'''CACHE''' is a [[Super FX]] instruction that might reset all cache flags. | {| class="wikitable" style="float:right;clear:right;width:50%" | ||
!colspan="8"|Basic Info | |||
|+ | |||
|'''Addressing Mode''' | |||
|'''Opcode''' | |||
|'''Length''' | |||
|'''ROM Speed''' | |||
|'''RAM Speed''' | |||
|'''Cache Speed''' | |||
|+ | |||
|[[Implied]] (type 2) | |||
|02 | |||
|1 byte | |||
|3 or 4 cycles | |||
|3 or 4 cycles | |||
|1 cycle | |||
|} | |||
{| class="wikitable" style="float:right;clear:right;width:30%" | |||
!colspan="9"|Flags Affected | |||
|+ | |||
|[[B Flag|B]] | |||
|[[ALT1]] | |||
|[[ALT2]] | |||
|[[O/V]] | |||
|[[Sign Flag|S]] | |||
|[[CY]] | |||
|[[Zero Flag|Z]] | |||
|+ | |||
|0 | |||
|0 | |||
|0 | |||
|. | |||
|. | |||
|. | |||
|. | |||
|} | |||
'''CACHE''' is a [[Super FX]] instruction that might reset all cache flags. If the [[cache base register]] is equal to R<sub>15</sub> & 0fff0h, nothing happens. Otherwise, set the cache base register to R<sub>15</sub> & 0fff0h and reset all cache flags. | |||
The [[ALT0]] state is restored. | |||
==== Syntax ==== | |||
<pre> | |||
CACHE | |||
</pre> | |||
=== See Also === | |||
* [[Cache RAM]] | |||
=== External Links === | |||
* Official Nintendo documentation on CACHE: 9.27 on [https://archive.org/details/SNESDevManual/book2/page/n194 page 2-9-38 of Book II] | |||
* cautions for 7.1.1 on [https://archive.org/details/SNESDevManual/book2/page/n135 page 2-7-1 of Book II] | |||
[[Category:ASM]] | |||
[[Category:Super FX]] | |||
[[Category:GSU Control Instructions]] | |||
[[Category:One-byte Instructions]] | |||
Latest revision as of 01:47, 12 August 2024
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | ROM Speed | RAM Speed | Cache Speed | ||
| Implied (type 2) | 02 | 1 byte | 3 or 4 cycles | 3 or 4 cycles | 1 cycle | ||
| Flags Affected | ||||||||
|---|---|---|---|---|---|---|---|---|
| B | ALT1 | ALT2 | O/V | S | CY | Z | ||
| 0 | 0 | 0 | . | . | . | . | ||
CACHE is a Super FX instruction that might reset all cache flags. If the cache base register is equal to R15 & 0fff0h, nothing happens. Otherwise, set the cache base register to R15 & 0fff0h and reset all cache flags.
The ALT0 state is restored.
Syntax
CACHE
See Also
External Links
- Official Nintendo documentation on CACHE: 9.27 on page 2-9-38 of Book II
- cautions for 7.1.1 on page 2-7-1 of Book II