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Non-Maskable Interrupt: Difference between revisions
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A '''non-maskable interrupt''' (NMI) is an interrupt that cannot be ignored. The | A '''non-maskable interrupt''' (NMI) is an interrupt that cannot be ignored. The [[PPU]] normally generates an NMI at the beginning of the [[vertical blanking period]], which is received by the [[Ricoh]] CPU. This is the only hardware NMI source on the SNES.<sup>[2]</sup> | ||
[[BRK]] causes a software NMI. | |||
NMIs have higher priority than [[IRQ]]s, but lower priority than Reset. | NMIs have higher priority than [[IRQ]]s, but lower priority than Reset. | ||
=== See Also === | |||
* [[NMI Enable Flag]] | |||
* [[SEI]] | |||
* [[CLI]] | |||
* [[DI]] | |||
* [[EI]] | |||
* [[BRK (SPC700)]] | |||
=== References === | === References === | ||
# 7.19 Interrupt Priorities, page 53: https://www.westerndesigncenter.com/wdc/documentation/w65c816s.pdf | |||
# https://problemkaputt.de/fullsnes.htm#snesppuinterrupts | |||
=== External Links === | |||
* snes9x implementation of NMI: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L2663 | |||
[[Category:ASM]] | |||
[[Category:SNES Hardware]] | |||
[[Category:Official Jargon]] | |||
Latest revision as of 04:18, 14 August 2024
A non-maskable interrupt (NMI) is an interrupt that cannot be ignored. The PPU normally generates an NMI at the beginning of the vertical blanking period, which is received by the Ricoh CPU. This is the only hardware NMI source on the SNES.[2]
BRK causes a software NMI.
NMIs have higher priority than IRQs, but lower priority than Reset.
See Also
References
- 7.19 Interrupt Priorities, page 53: https://www.westerndesigncenter.com/wdc/documentation/w65c816s.pdf
- https://problemkaputt.de/fullsnes.htm#snesppuinterrupts
External Links
- snes9x implementation of NMI: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L2663