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Memory ①: Difference between revisions
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'''Memory | '''Memory ①''' is a region of the [[5A22]]'s address space. Memory ① consists of: | ||
* the upper half (8000h - FFFFh) of banks 00h - 3Fh | * the upper half (8000h - FFFFh) of banks 00h - 3Fh | ||
* all of banks 40h - 7Dh | * all of banks 40h - 7Dh | ||
Thus, when labeled on a memory map, Memory | Thus, when labeled on a memory map, Memory ① forms a concave region; see Figure 2-21-1 of the official Super Nintendo development manual. | ||
=== See Also === | === See Also === | ||
* [[Memory | * [[Memory ②]] | ||
* [[RAM ①]] | |||
* [[RAM ②]] | |||
=== | === Reference === | ||
# top of [https://archive.org/details/SNESDevManual/book1/page/n93 page 2-21-2 of Book I] of the official Super Nintendo development manual, the right-hand side of the figure | |||
[[Category:SNES Hardware]] | [[Category:SNES Hardware]] | ||
[[Category:Address Spaces]] | |||
Latest revision as of 20:59, 21 August 2024
Memory ① is a region of the 5A22's address space. Memory ① consists of:
- the upper half (8000h - FFFFh) of banks 00h - 3Fh
- all of banks 40h - 7Dh
Thus, when labeled on a memory map, Memory ① forms a concave region; see Figure 2-21-1 of the official Super Nintendo development manual.
See Also
Reference
- top of page 2-21-2 of Book I of the official Super Nintendo development manual, the right-hand side of the figure