NOTC (SPC700): Difference between revisions

Latest revision as of 03:27, 9 August 2024


Basic Info
Addressing Mode	Opcode	Length	Speed
Implied (type 2)	ED	1 byte	3 cycles


Flags Affected
N	V	P	B	H	I	Z	C
.	.	.	.	.	.	.	!C

NOTC is an SPC700 instruction that inverts the carry flag.

No other flags are affected.

NOTC

@@ Line 7: / Line 7: @@
 |'''Speed'''
 |+
-|implied
+|[[Implied]] (type 2)
 |ED
 |1 byte
@@ Line 14: / Line 14: @@
 {| class="wikitable" style="float:right;clear:right;width:30%"
-!colspan="8"|Flags Clobbered
+!colspan="8"|Flags Affected
 |+
-|N
+|[[Negative Flag|N]]
-|V
+|[[Overflow Flag|V]]
-|P
+|[[Direct Page Flag|P]]
-|B
+|[[Break Flag|B]]
-|H
+|[[Half-Carry Flag|H]]
-|I
+|[[Interrupt Enable Flag|I]]
-|Z
+|[[Zero Flag|Z]]
-|C
+|[[Carry Flag|C]]
 |+
 |.
@@ Line 35: / Line 35: @@
 |}
-'''NOTC''' is an [[SPC700]] instruction that inverts the carry flag.
+'''NOTC''' is an [[SPC700]] instruction that inverts the [[carry flag]].
+No other flags are affected.
+==== Syntax ====
+<pre>
+NOTC
+</pre>
 === See Also ===
@@ Line 41: / Line 48: @@
 * [[CLRC]]
 * [[NOT1]]
+* [[CLC]]
+* [[SEC]]
+* [[NOT]]
 === External Links ===
-* Official Super Nintendo development manual on NOTC: [https://archive.org/details/SNESDevManual/book1/page/n235 Appendix C-10 of Book I]
+* Official Super Nintendo development manual on NOTC: Table C-19 in [https://archive.org/details/SNESDevManual/book1/page/n235 Appendix C-10 of Book I]
+* anomie: https://github.com/yupferris/TasmShiz/blob/master/spc700.txt#L516
 [[Category:ASM]]
 [[Category:SPC700]]
 [[Category:Program Status Flag Operation Commands]]
+[[Category:One-byte Instructions]]