Non-Maskable Interrupt: Difference between revisions

Latest revision as of 04:18, 14 August 2024

A non-maskable interrupt (NMI) is an interrupt that cannot be ignored. The PPU normally generates an NMI at the beginning of the vertical blanking period, which is received by the Ricoh CPU. This is the only hardware NMI source on the SNES.^[2]

BRK causes a software NMI.

NMIs have higher priority than IRQs, but lower priority than Reset.

References

7.19 Interrupt Priorities, page 53: https://www.westerndesigncenter.com/wdc/documentation/w65c816s.pdf
https://problemkaputt.de/fullsnes.htm#snesppuinterrupts

External Links

snes9x implementation of NMI: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L2663

@@ Line 1: / Line 1: @@
-A '''non-maskable interrupt''' (NMI) is an interrupt that cannot be ignored.  The [[PPU]] normally generates an NMI at the beginning of the [[vertical blanking period]], which is received by the Ricoh CPU.  This is the only NMI source on the SNES.<sup>[2]</sup>
+A '''non-maskable interrupt''' (NMI) is an interrupt that cannot be ignored.  The [[PPU]] normally generates an NMI at the beginning of the [[vertical blanking period]], which is received by the [[Ricoh]] CPU.  This is the only hardware NMI source on the SNES.<sup>[2]</sup>
+[[BRK]] causes a software NMI.
 NMIs have higher priority than [[IRQ]]s, but lower priority than Reset.
@@ Line 5: / Line 7: @@
 === See Also ===
 * [[NMI Enable Flag]]
+* [[SEI]]
+* [[CLI]]
+* [[DI]]
+* [[EI]]
+* [[BRK (SPC700)]]
 === References ===
@@ Line 15: / Line 22: @@
 [[Category:ASM]]
 [[Category:SNES Hardware]]
+[[Category:Official Jargon]]