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PLY: Difference between revisions

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(cycle penalty)
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!colspan="9"|Flags Affected
!colspan="9"|Flags Affected
|+
|+
|N
|[[Negative Flag|N]]
|V
|[[Overflow Flag|V]]
|M
|[[M Flag|M]]
|X
|[[X Flag|X]]
|D
|[[Decimal Flag|D]]
|I
|[[I Flag|I]]
|Z
|[[Zero Flag|Z]]
|C
|[[Carry Flag|C]]
|+
|+
|
|

Revision as of 04:11, 27 November 2023

Basic Info
Addressing Mode Opcode Length Speed
Stack (Pull) 7A 1 byte 4 cycles*
Flags Affected
N V M X D I Z C
. . . . . .

PLY (PulL Y) is a 65x instruction that pulls the value at the top of the stack into the Y index register.

Cycle Penalty
  • PLY takes one additional cycle if the index registers are 16 bits wide.

See Also

External Links