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COP: Difference between revisions

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'''COP''' (Co-Processor) is a [[65c816]] instruction designed to run a co-processor command.  The byte following the opcode is called the [[Signature Byte]].  Signature bytes of 80h to FFh are reserved by the Western Design Center.  The state of the [[interrupt disable flag]] has no effect on the behavior of COP.
'''COP''' (Co-Processor) is a [[65c816]] instruction designed to run a co-processor command.  The byte following the opcode is called the [[Signature Byte]].  Signature bytes of 80h to FFh are reserved by the Western Design Center.  The state of the [[interrupt disable flag]] has no effect on the behavior of COP.


=====Cycle Penalty =====
=====Cycle Skipped =====
* COP takes one extra cycle in [[native mode]] as it needs to push the [[program counter bank register]] to the [[stack]].
* COP takes one fewer cycle in [[emulation mode]] as it doesn't need to push the [[program counter bank register]] to the [[stack]].


=== See Also ===
=== See Also ===

Revision as of 06:06, 26 November 2023

Basic Info
Addressing Mode Opcode Length Speed
Stack 02 2 bytes 8 cycles*
Flags Affected
N V M X D I Z C
. . . . 0 1 . .

COP (Co-Processor) is a 65c816 instruction designed to run a co-processor command. The byte following the opcode is called the Signature Byte. Signature bytes of 80h to FFh are reserved by the Western Design Center. The state of the interrupt disable flag has no effect on the behavior of COP.

Cycle Skipped

See Also

External Links