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Program Bank Register: Difference between revisions
From SnesLab
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=== Reference === | === Reference === | ||
# 4.5 on page 2-4-5 of Book II | # section 4.5 on [https://archive.org/details/SNESDevManual/book2/page/n111 page 2-4-5 of Book II] | ||
[[Category:SNES Hardware]] | [[Category:SNES Hardware]] | ||
[[Category:Registers]] | [[Category:Registers]] | ||
Revision as of 07:12, 19 December 2023
The Program Bank Register (PBR) exists on the 65c816. It is 8 bits wide.
There is also a program bank register on the GSU.[1]
See Also
Reference
- section 4.5 on page 2-4-5 of Book II