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Stack Relative Addressing: Difference between revisions
From SnesLab
(→Reference: added ref to datasheet) |
(always in bank 0) |
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* [[SBC]] (opcode E3) | * [[SBC]] (opcode E3) | ||
* [[STA]] (opcode 83) | * [[STA]] (opcode 83) | ||
The effective addresses generated by stack relative addressing will always be in [[bank]] 0.<sup>[3]</sup> | |||
=== See Also === | === See Also === | ||
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=== References === | === References === | ||
# [[Eyes & Lichty]] page 418, https://archive.org/details/0893037893ProgrammingThe65816/page/n444 | |||
# section 3.5.23 of 65c816 datasheet, https://westerndesigncenter.com/wdc/documentation/w65c816s.pdf | |||
# lbid, section 3.2 | |||
[[Category:Addressing Modes]] | [[Category:Addressing Modes]] | ||
[[Category:65c816 additions]] | [[Category:65c816 additions]] | ||
[[Category:ASM]] | [[Category:ASM]] | ||
Revision as of 18:55, 27 June 2024
Stack Relative Addressing is supported by eight instructions:
- ADC (opcode 63)
- AND (opcode 23)
- CMP (opcode C3)
- EOR (opcode 43)
- LDA (opcode A3)
- ORA (opcode 03)
- SBC (opcode E3)
- STA (opcode 83)
The effective addresses generated by stack relative addressing will always be in bank 0.[3]
See Also
References
- Eyes & Lichty page 418, https://archive.org/details/0893037893ProgrammingThe65816/page/n444
- section 3.5.23 of 65c816 datasheet, https://westerndesigncenter.com/wdc/documentation/w65c816s.pdf
- lbid, section 3.2