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BIC (Super FX): Difference between revisions
From SnesLab
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!colspan="9"|Flags Affected | !colspan="9"|Flags Affected | ||
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|B | |[[B Flag|B]] | ||
|[[ALT1]] | |[[ALT1]] | ||
|[[ALT2]] | |[[ALT2]] | ||
Revision as of 20:31, 1 July 2024
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | ROM Speed | RAM Speed | Cache Speed | ||
| Implied | 3D7n | 2 bytes | 6 cycles | 6 cycles | 2 cycles | ||
| Immediate | 3F7n | 2 bytes | 6 cycles | 6 cycles | 2 cycles | ||
| Flags Affected | ||||||||
|---|---|---|---|---|---|---|---|---|
| B | ALT1 | ALT2 | O/V | S | CY | Z | ||
| 0 | 0 | 0 | . | . | ||||
BIC (BIt Clear mask) is a Super FX instruction that performs a logical AND between the source register and the 1's complement of the operand. The conjunction is stored in the destination register.
See Also
External Links
- Official Nintendo documentation on BIC: Page 2-9-22 of Book II