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MERGE (Super FX): Difference between revisions
From SnesLab
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The official documentation has several bits labeled "B" not 'D" below the "Flags affected" table.<sup>[1]</sup> | The official documentation has several bits labeled "B" not 'D" below the "Flags affected" table.<sup>[1]</sup> | ||
[[File:gsu_merge.png]] | |||
=== See Also === | === See Also === | ||
Revision as of 20:30, 2 July 2024
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | ROM Speed | RAM Speed | Cache Speed | ||
| Implied (type 1) | 70 | 1 byte | 3 cycles | 3 cycles | 1 cycle | ||
| Flags Affected | ||||||||
|---|---|---|---|---|---|---|---|---|
| B | ALT1 | ALT2 | O/V | S | CY | Z | ||
| 0 | 0 | 0 | ||||||
MERGE is a Super FX instruction that merges the high byte of two registers into the destination register.
The high byte of Dreg comes from R7. The low byte of Dreg comes from R8.
The official documentation has several bits labeled "B" not 'D" below the "Flags affected" table.[1]
See Also
External Links
- Official Nintendo documentation on MERGE: paragraph 9.56 on page 2-9-79 of Book II
- example: page 2-9-80 of Book II, lbid.