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OR (Super FX): Difference between revisions
From SnesLab
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(implied type 1) |
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Revision as of 03:27, 4 July 2024
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | ROM Speed | RAM Speed | Cache Speed | ||
| Immediate | 3ECn | 2 bytes | 6 cycles | 6 cycles | 2 cycle | ||
| Implied (type 1) | Cn | 1 byte | 3 cycles | 3 cycles | 1 cycle | ||
| Flags Affected | ||||||||
|---|---|---|---|---|---|---|---|---|
| B | ALT1 | ALT2 | O/V | S | CY | Z | ||
| 0 | 0 | 0 | . | . | ||||
OR is a Super FX instruction that performs a logical bitwise OR between the source register and its operand. The disjunction is stored in the destination register. The operand may be any register from R1 to R15 or any immediate value from 1 to 15.
Syntax
OR Rn OR #n
See Also
External Links
- Official Nintendo documentation on OR: 9.70 on page 2-9-97 of Book II
- example: page 2-9-98 of Book II, lbid.