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ADC (Super FX): Difference between revisions
From SnesLab
(→See Also: ALT1) |
(→See Also: other ADC) |
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=== See Also === | === See Also === | ||
* [[ADD]] | * [[ADD]] | ||
* [[ADC]] | * [[ADC]] (65c816) | ||
* [[SUB]] | * [[SUB]] | ||
* [[ALT1]] | * [[ALT1]] |
Revision as of 08:27, 9 July 2024
Basic Info | |||||||
---|---|---|---|---|---|---|---|
Addressing Mode | Opcode | Length | ROM Speed | RAM Speed | Cache Speed | ||
Implied (type 1) | 3D5n | 2 bytes | 6 cycles | 6 cycles | 2 cycles | ||
Immediate | 3F5n | 2 bytes | 6 cycles | 6 cycles | 2 cycles |
Flags Affected | ||||||||
---|---|---|---|---|---|---|---|---|
B | ALT1 | ALT2 | O/V | S | CY | Z | ||
0 | 0 | 0 |
ADC (Add with carry) is a Super FX instruction that performs an addition. The source register is always the first addend. The second addend may be any of the 16 R registers or an immediate value. The third addend is CY. The sum is stored in the destination register.
Syntax
ADC Rn ADC #n
See Also
External Links
- Official Nintendo documentation on ADC: Page 2-9-3 of Book II
- ADC with immediate addressing: Page 2-9-4 of Book II, lbid.