STX

Basic Info
Addressing Mode	Opcode	Length	Speed
Absolute	8E	3 bytes	4 cycles*
Direct Page	86	2 bytes	3 cycles*
Direct Page Indexed by Y	96	2 bytes	4 cycles*

Flags Affected
N	V	M	X	D	I	Z	C
.	.	.	.	.	.	.	.

STX (Store X) is a 65x instruction that stores the value of the X index register.

No flags are affected.

Syntax

STX addr
STX dp
STX dp, Y

Cycle Penalties

• STX takes one additional cycle when the index registers are 16 bits wide, in all addressing modes.
• In both direct page addressing modes only, STX takes another additional cycle if the low byte of the direct page register is nonzero.

See Also

• LDX
• STA
• STY
• STZ
• TXA
• TXY

External Links

• Eyes & Lichty page 505, on STX: https://archive.org/details/0893037893ProgrammingThe65816/page/505
• Labiak page 186 on STX: https://archive.org/details/Programming_the_65816/page/n196
• MCS6500 Manual page 97 on STX: https://archive.org/details/mos_microcomputers_programming_manual/page/n115
• Carr page 274 on STX: https://archive.org/details/6502UsersManual/page/n287
• Leventhal page 3-97 on STX: https://archive.org/details/6502-assembly-language-programming/page/n146
• snes9x implementation of STX: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1287
• undisbeliever on STX: https://undisbeliever.net/snesdev/65816-opcodes.html#stx-store-index-register-x-to-memory