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PLP: Difference between revisions
From SnesLab
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|[[6502 emulation mode]] | |[[6502 emulation mode]] | ||
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Revision as of 06:10, 25 July 2024
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Stack (Pull) | 28 | 1 byte | 4 cycles | ||||
| Flags Affected | ||||||||
|---|---|---|---|---|---|---|---|---|
| N | V | M | X / B | D | I | Z | C | |
| 65c816 native mode | N | V | M | X | D | I | Z | C |
| 6502 emulation mode | N | V | . | B | D | I | Z | C |
PLP (PulL status flags) is a 65x instruction that pulls the 8-bit value at the top of the stack into the status register. The stack pointer is incremented before the byte is pulled.
The emulation mode bit is not on the stack so it does not get pulled.
Syntax
PLP
See Also
External Links
- Eyes & Lichty page 486, on PLP: https://archive.org/details/0893037893ProgrammingThe65816/page/486
- Labiak page 170 on PLP: https://archive.org/details/Programming_the_65816/page/n180
- MCS6500 Manual page 123 on PLP: https://archive.org/details/mos_microcomputers_programming_manual/page/n142
- Carr page 268 on PLP: https://archive.org/details/6502UsersManual/page/n281
- Leventhal page 3-84 on PLP: https://archive.org/details/6502-assembly-language-programming/page/n133
- snes9x implementation of PLP: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L2099
- Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#6.8.3