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PLD: Difference between revisions
From SnesLab
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PLD works even in [[emulation mode]], and instructions that used [[zero page addressing]] on the 6502 will use [[direct page addressing]] instead with the direct offset still added into their effective address. | |||
=== See Also === | === See Also === | ||
Revision as of 00:57, 13 August 2024
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Stack (Pull) | 2B | 1 byte | 5 cycles | ||||
| Flags Affected | ||||||||
|---|---|---|---|---|---|---|---|---|
| N | V | M | X | D | I | Z | C | |
| N | . | . | . | . | . | Z | . | |
PLD (PulL Direct page) is a 65c816 instruction that pulls the 16-bit value at the top of the stack into the direct page register. The low byte of this register is pulled first. After PLD completes, the stack pointer is pointing to where the high byte was, which becomes the next available stack location.
Syntax
PLD
PLD works even in emulation mode, and instructions that used zero page addressing on the 6502 will use direct page addressing instead with the direct offset still added into their effective address.
See Also
External Links
- Eyes & Lichty, page 485 on PLD
- Labiak, page 169 on PLD
- snes9x implementation of PLD: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L2069
- Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#6.8.3