COP: Difference between revisions

Revision as of 22:26, 10 August 2024


Basic Info
Addressing Mode	Opcode	Length	Speed
Stack (Interrupt)	02	2 bytes	8 cycles*


Flags Affected
N	V	M	X	D	I	Z	C
.	.	.	.	0	1	.	.

COP (Co-Processor) is a 65c816 instruction designed to run a co-processor command. COP triggers a software interrupt and control is routed to the COP handler, whose address is stored in the COP vector at $FFE4 (in native mode anyway, in emulation mode $FFF4 is used instead). The byte following the opcode is called the signature byte and is required by assemblers:

Signature bytes of 00h to 7Fh can be programmer-defined
Signature bytes of 80h to FFh are reserved for future microprocessors by the Western Design Center^[3]

The state of the interrupt disable flag has no effect on the behavior of COP although it will be set after COP runs.

Some examples of the kinds of microprocessors COP could be used to communicate with include:

floating point
graphics

The PBR is cleared, but in native mode its previous value is pushed to the stack.

Syntax

COP sig

Cycle Skipped

COP takes one fewer cycle in emulation mode as it doesn't need to push the program counter bank register to the stack.

External Links

Eyes & Lichty, page 447 on COP
Labiak, page 135 on COP
section 7.15 of 65c816 datasheet
snes9x implementation of COP: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L2738
https://ersanio.gitbook.io/assembly-for-the-snes/deep-dives/misc
https://undisbeliever.net/snesdev/65816-opcodes.html#software-interrupts

@@ Line 54: / Line 54: @@
 =====Cycle Skipped =====
 * COP takes one fewer cycle in [[emulation mode]] as it doesn't need to push the [[program counter bank register]] to the [[stack]].
+[[File:cop.png]]
 === See Also ===